公开(公告)号：US20250063725A1

公开(公告)日：2025-02-20

申请号：US18656933

申请日：2024-05-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jongmin KIM ,  Seungbo KO ,  Donghyuk AHN ,  Minyoung LEE

IPC: H10B12/00 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66

Abstract: A semiconductor device may include first and second bit lines that each include a line portion, a connection portion extending from the line portion into a first extension region, and a pad portion extending from the connection portion in the first extension region; and a third bit line between the line portions of the first and second bit lines in a memory cell array region and the first extension region. A first end portion of the third bit line may be in the first extension region. The pad portions of the first and second bit lines each may be wider than the line portions of the first and second bit lines. A minimum distance between the pad portions of the first and second bit lines may be less than a minimum distance between the line portion of the first bit line and the third bit line.

公开(公告)号：US20230422488A1

公开(公告)日：2023-12-28

申请号：US18192329

申请日：2023-03-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jongmin KIM ,  Sohyun Park ,  Chansic Yoon ,  Dongmin Choi ,  Seungbo Ko ,  Hyosub Kim ,  Jingkuk Bae ,  Woojin Jeong ,  Eunkyung Cha ,  Junhyeok Ahn

IPC: H10B12/00

CPC classification number: H10B12/485 ,  H10B12/0335 ,  H10B12/482 ,  H10B12/315

Abstract: A semiconductor device including a first contact plug structure on a substrate, a lower spacer structure on a sidewall of the first contact plug structure, and a bit line structure on the first contact plug structure and including a conductive structure and an insulation structure stacked in a vertical direction substantially perpendicular to an upper surface of the substrate may be provided. The first contact plug structure may include a conductive pad contacting the upper surface of the substrate, an ohmic contact pattern on the conductive pad, and a conductive filling pattern on the ohmic contact pattern. The conductive filling pattern may include metal, and include a lower portion having a relatively large width and an upper portion having a relatively small width. The lower spacer structure may contact a sidewall of the conductive filling pattern.

公开(公告)号：US20200381075A1

公开(公告)日：2020-12-03

申请号：US16998068

申请日：2020-08-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jongmin KIM ,  Yeongjin SEO ,  Keun-Hwan LEE

IPC: G11C29/50 ,  G11C29/12 ,  G11C29/02 ,  G06F12/00

Abstract: A storage device includes a plurality of nonvolatile memory devices; and a controller connected in common to the plurality of nonvolatile memory devices through data lines, the controller being configured to detect first offset information by performing a first training operation with respect to a first nonvolatile memory device from among the plurality of nonvolatile memory devices, the controller being further configured to, based on the first offset information, perform a second training operation with respect to a second nonvolatile memory device from among the plurality of nonvolatile memory devices.

公开(公告)号：US20250007148A1

公开(公告)日：2025-01-02

申请号：US18786248

申请日：2024-07-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jongmin KIM ,  Eunbae KWON ,  Hyoseok NA ,  Kyonghwan CHO ,  Sungjae MOON ,  Wanjae JU

IPC: H01Q1/24 ,  H01Q1/38 ,  H04M1/02

Abstract: According to an example embodiment of the disclosure, an electronic device is provided. The electronic device includes a front cover forming at least a portion of the front surface of the electronic device, a non-conductive case including a rear portion forming at least a portion of the rear surface of the electronic device and a side portion forming at least a portion of the side surface of the electronic device, a support positioned between the front cover and the non-conductive case and including a first portion and a second portion, wherein the first portion is positioned between the second portion and the side portion, a first conductive pattern disposed between the first portion or the side portion, a second conductive pattern positioned between the second portion and the rear portion and spaced apart from the first conductive pattern, a wireless communication circuit configured to transmit a signal in a designated frequency band through the first conductive pattern and the second conductive pattern, and a seal disposed between the first portion and the rear portion and configured to block fluid flow from a first area where the first conductive pattern is disposed to a second area where the second conductive pattern is disposed.

公开(公告)号：US20240321735A1

公开(公告)日：2024-09-26

申请号：US18601467

申请日：2024-03-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seungbo KO ,  Sujin KANG ,  Jongmin KIM ,  Donghyuk AHN ,  Jiwon OH ,  Chansic YOON ,  Myeongdong LEE ,  Minyoung LEE ,  Inho CHA

IPC: H01L23/528 ,  H10B12/00

CPC classification number: H01L23/528 ,  H10B12/00

Abstract: A semiconductor device includes a substrate, a word line extending on the substrate in a first horizontal direction, a bit line extending on the substrate in a second horizontal direction perpendicular to the first horizontal direction, and a spacer structure on one sidewall of the bit line, wherein the bit line includes a lower conductive layer, an intermediate conductive layer, and an upper conductive layer stacked in a vertical direction on the substrate, and the spacer structure includes a depletion stopping layer on one sidewall of the lower conductive layer, extending in the vertical direction and including a material layer having an interfacial trap density less than an interfacial trap density of a silicon nitride layer, and an inner spacer extending in the vertical direction and on one sidewall of the depletion stopping layer.

公开(公告)号：US20240315010A1

公开(公告)日：2024-09-19

申请号：US18435198

申请日：2024-02-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Taejin PARK ,  Jongmin KIM ,  Huijung KIM ,  Kiseok LEE ,  Myeongdong LEE

IPC: H10B12/00

CPC classification number: H10B12/34 ,  H10B12/03 ,  H10B12/482 ,  H10B12/488

Abstract: Provided is a semiconductor device comprising: an active region defined by an element isolation film in a substrate; a word line extending in a first horizontal direction in the substrate; a bit line extending in a second horizontal direction crossing the first horizontal direction on the substrate; an additional pad disposed on the active region; and a buried contact on the additional pad wherein the buried contact is electrically connected to the active region by the additional pad, wherein the additional pad comprises a first surface that overlaps the word line in a vertical direction, and a second surface that is free of overlap with the word line in the vertical direction, and wherein, the first surface meets the second surface at a cusp.

公开(公告)号：US20240306377A1

公开(公告)日：2024-09-12

申请号：US18488229

申请日：2023-10-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jongmin KIM ,  Kiseok LEE ,  Seung-Bo KO ,  Chan-Sic YOON ,  Myeong-Dong LEE

IPC: H10B12/00

CPC classification number: H10B12/485 ,  H10B12/01 ,  H10B12/315

Abstract: A semiconductor device including a first active pattern and a second active pattern each extending along a first direction and arranged along a second direction intersecting the first direction each of the first and second active patterns including a central part, a first edge part, and a second edge part, a storage node pad on the first edge part of the first active pattern, and a bit-line node contact on the central part of the first active pattern, wherein a top surface of the bit-line node contact is located at a higher level than a top surface of the storage node pad may be provided.

公开(公告)号：US20240032200A1

公开(公告)日：2024-01-25

申请号：US18446820

申请日：2023-08-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Taihwan CHOI ,  Jongdoo KIM ,  Jongmin KIM ,  Ungki MIN ,  Gunhee PARK ,  Daeseung PARK ,  Garam YU ,  Bongyeol LEE ,  Hanyeop LEE ,  Gun LIM

IPC: H05K1/18

CPC classification number: H05K1/183 ,  H05K2201/10037 ,  H05K2201/10083

Abstract: An electronic device is provided. The electronic device includes an electronic component including a coil therein, and a printed circuit board that is disposed to surround at least a part of the electronic component and includes plural slits disposed at preset intervals in at least one of regions facing the electronic component, wherein each of the plural slits may include a central slit portion extended along a center of the slit, and a symmetric slit portion extended to be symmetric with respect to the central slit portion.

公开(公告)号：US20230422486A1

公开(公告)日：2023-12-28

申请号：US18109442

申请日：2023-02-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kiseok LEE ,  Jongmin KIM ,  Hyo-Sub KIM ,  Hui-Jung KIM ,  Sohyun PARK ,  Junhyeok AHN ,  Chan-Sic YOON ,  Myeong-Dong LEE ,  Woojin JEONG ,  Wooyoung CHOI

IPC: H10B12/00

CPC classification number: H10B12/482 ,  H10B12/34 ,  H10B12/053 ,  H10B12/485

Abstract: A semiconductor device includes a cell active pattern including a first portion and a second portion that are spaced apart from each other; a gate structure between the first portion and the second portion of the cell active pattern; a bit-line contact on the first portion of the cell active pattern; a connection pattern on the second portion of the cell active pattern; and a cell separation pattern in contact with the bit-line contact and the connection pattern, wherein the cell separation pattern includes a first sidewall in contact with the connection pattern and a second sidewall in contact with the bit-line contact, an upper portion of the second sidewall of the cell separation pattern is in contact with the bit-line contact, and a lower portion of the second sidewall of the cell separation pattern is spaced apart from the bit-line contact.

公开(公告)号：US20230327323A1

公开(公告)日：2023-10-12

申请号：US18210975

申请日：2023-06-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jongmin KIM ,  Sangho HONG ,  Hyoseok NA ,  Gunhee PARK ,  Yongam SON ,  Jongkwan LEE ,  Hanyeop LEE ,  Taihwan CHOI

IPC: H01Q1/24 ,  H04N23/57 ,  H01Q5/314

CPC classification number: H01Q1/243 ,  H04N23/57 ,  H01Q5/314

Abstract: An electronic device according to an embodiment may include a camera module, a metal structure, a first antenna adjacent to the camera module, a second antenna spaced from the camera module, a switching module electrically connected to the metal structure, including at least one lumped element, and adjusting an impedance by using the at least one lumped element, and at least one processor. The at least one processor is configured to transmit a signal in a first frequency band by feeding the first antenna and control the switching module such that the switching module has a first impedance corresponding to the first frequency band and electrically connects the metal structure and the ground when the transmission power of the first antenna is equal to or more than the designated value.