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公开(公告)号:US20240244896A1
公开(公告)日:2024-07-18
申请号:US18373377
申请日:2023-09-27
Applicant: Samsung Display Co., LTD.
Inventor: Jongchan LEE , Seunggyu TAE , Yuri OH , Kibok YOO , Donghyeok LEE , Jinsuk LEE
IPC: H10K59/124 , G09G3/3233
CPC classification number: H10K59/124 , G09G3/3233 , G09G2300/0819 , G09G2300/0852 , G09G2300/0861
Abstract: A display panel includes a substrate including an opening area, a display area surrounding at least a portion of the opening area, and an intermediate area between the opening area and the display area, a light-emitting diode disposed on the display area and including a pixel electrode, an opposite electrode, and an intermediate layer between the pixel electrode and the opposite electrode, an inorganic insulating layer disposed on the intermediate area and defining a trench surrounding the opening area, and a separator disposed on an upper surface of the inorganic insulating layer and a side surface of the inorganic insulating layer, the side surface defining the trench, in the intermediate area, where the separator includes a protrusion at a corner portion of the inorganic insulating layer where the upper surface meets the side surface.
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公开(公告)号:US20210249490A1
公开(公告)日:2021-08-12
申请号:US16943744
申请日:2020-07-30
Applicant: Samsung Display Co., Ltd.
Inventor: Jongchan LEE , Taehee LEE
IPC: H01L27/32
Abstract: A display device includes a substrate including a pixel area and a transmission area; a plurality of insulating layers on the pixel area and the transmission area; a first conductive layer on the plurality of insulating layers of the pixel area, the first conductive layer including a first sidewall having a first inclination angle and a second sidewall having a second inclination angle different from the first inclination angle; a first spacer located on a same layer as the first conductive layer, the first spacer being at a boundary between the pixel area and the transmission area and extending to the pixel area and the transmission area; and a first planarization layer on the first conductive layer.
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公开(公告)号:US20210159288A1
公开(公告)日:2021-05-27
申请号:US16892963
申请日:2020-06-04
Applicant: Samsung Display Co., Ltd.
Inventor: Jongchan LEE , Kibum KIM , Myeonghun SONG , Jeonghyun LEE , Sanghee JANG , Woonghee JEONG
Abstract: A method of manufacturing a display device includes preparing a substrate, wherein the substrate includes a pixel area and a transmission area, forming insulating layers in the pixel area and in the transmission area, forming a pixel electrode on the insulating layers in the pixel area and forming a pixel-defining layer on the pixel electrode, wherein the pixel-defining layer exposes at least part of the pixel electrode, forming a metal layer on the pixel-defining layer in the pixel area, the at least part of the pixel electrode exposed by the pixel-defining layer in the pixel area, and the insulating layers in the transmission area, removing the metal layer on the insulating layers in the transmission area, and removing the insulating layers in the transmission area.
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公开(公告)号:US20200176576A1
公开(公告)日:2020-06-04
申请号:US16781081
申请日:2020-02-04
Applicant: Samsung Display Co., LTD.
Inventor: Jongchan LEE , Taehoon YANG , Woonghee JEONG , Kyoungwon LEE , Yongsu LEE
IPC: H01L29/417 , H01L27/12 , H01L29/786 , H01L29/66
Abstract: A display device includes a first insulation layer on a first gate electrode, an active pattern on the first insulation layer and including an NMOS area and a PMOS area, the PMOS area overlapping the first gate electrode, a second insulation layer on the active pattern. The active pattern includes an NMOS area and a PMOS area, with the PMOS area overlapping the first gate electrode. In addition, a second gate electrode is on the second insulation layer and overlaps the NMOS area. An active-protecting pattern is in the same layer as the second gate electrode and passes through the second insulation layer to contact the PMOS area. A third insulation layer is on the active-protecting pattern and the second gate electrode. A data metal electrode passes through the third insulation layer and contacts the active-protecting pattern.
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公开(公告)号:US20180366525A1
公开(公告)日:2018-12-20
申请号:US15870095
申请日:2018-01-12
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Jongchan LEE , Taehoon YANG , Woonghee JEONG , Kyoungwon LEE , Yongsu LEE
CPC classification number: H01L29/41783 , H01L27/1222 , H01L27/1251 , H01L27/127 , H01L29/66575 , H01L29/66696 , H01L29/78675 , H01L29/78678
Abstract: A display device includes a first insulation layer on a first gate electrode, an active pattern on the first insulation layer and including an NMOS area and a PMOS area, the PMOS area overlapping the first gate electrode, a second insulation layer on the active pattern. The active pattern includes an NMOS area and a PMOS area, with the PMOS area overlapping the first gate electrode. In addition, a second gate electrode is on the second insulation layer and overlaps the NMOS area. An active-protecting pattern is in the same layer as the second gate electrode and passes through the second insulation layer to contact the PMOS area. A third insulation layer is on the active-protecting pattern and the second gate electrode. A data metal electrode passes through the third insulation layer and contacts the active-protecting pattern.
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公开(公告)号:US20240153925A1
公开(公告)日:2024-05-09
申请号:US18382200
申请日:2023-10-20
Applicant: Samsung Display Co., LTD.
Inventor: Jongchan LEE , Jinsuk LEE , Yongho YANG , Seunggyu TAE
IPC: H01L25/075 , H01L33/44 , H01L33/52
CPC classification number: H01L25/0753 , H01L33/44 , H01L33/52
Abstract: A display panel includes a substrate which includes an upper surface and a lower surface and through which a through-hole that passes through the lower surface from the upper surface is defined, a light-emitting diode disposed on the upper surface of the substrate, the light-emitting diode including a first electrode, a second electrode, and an intermediate layer between the first electrode and the second electrode, and a separator disposed in an intermediate area between the light-emitting diode and the through-hole of the substrate, and including a first layer, a second layer on the first layer, and a third layer disposed below the first layer. A width of a lower surface of the second layer is greater than a width of an upper surface of the first layer, and a protective layer disposed on the separator and including a same material as a material of the first electrode of the light-emitting diode.
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公开(公告)号:US20190280021A1
公开(公告)日:2019-09-12
申请号:US16286744
申请日:2019-02-27
Applicant: Samsung Display Co., Ltd.
Inventor: Kyoungwon LEE , Taehoon YANG , Jongchan LEE , Woonghee JEONG , Yongsu LEE
IPC: H01L27/12 , H01L29/786 , H01L29/66
Abstract: A thin film transistor substrate, a display device, a method of manufacturing a thin film transistor substrate, and a method of manufacturing a display device, the thin film transistor substrate including a substrate; a first thin film transistor on the substrate, the first thin film transistor including a first active pattern, and a first gate electrode arranged to overlap at least a part of the first active pattern; and a second thin film transistor on the substrate, the second thin film transistor including a second active pattern that includes a plurality of protrusions on an upper surface thereof, and a second gate electrode arranged to overlap at least a part of the second active pattern.
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公开(公告)号:US20180366526A1
公开(公告)日:2018-12-20
申请号:US15871271
申请日:2018-01-15
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Jongchan LEE , Taehoon YANG , Woonghee JEONG , Kyoungwon LEE , Yongsu LEE
Abstract: A display device includes at least one transistor. The transistor has an active pattern including a first active area and a second active area. The first active area includes a first channel area and an n-doped area contacting the first channel area. The second active area includes a second channel area and a p-doped area contacting the second channel area. A first insulation layer covers at least a portion of the active pattern. A first gate electrode is disposed on the first insulation layer and at least partially overlaps the first channel area. A second gate electrode is disposed on the first insulation layer and at least partially overlaps the second channel area. A taper angle of the second gate electrode is larger than a taper angle of the first gate electrode.
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公开(公告)号:US20180366493A1
公开(公告)日:2018-12-20
申请号:US15869748
申请日:2018-01-12
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Woonghee JEONG , Taehoon YANG , Kyoungwon LEE , Jongchan LEE , Yongsu LEE
IPC: H01L27/12 , H01L27/092 , H01L29/45 , H01L27/32
CPC classification number: H01L27/124 , H01L27/3258 , H01L27/3276 , H01L29/78621
Abstract: A display device includes a common active pattern, a first gate electrode, and a second gate electrode. The common active pattern includes an NMOS area, a PMOS area, and a silicide area in a same layer as the NMOS area and the PMOS area. The silicide area electrically connects the NMOS area to the PMOS area. The NMOS area includes a first channel area and an n-doped area contacting the first channel area. The PMOS area includes a second channel area and a p-doped area contacting the second channel area. The first gate electrode overlaps the first channel area, and the second gate electrode overlaps the second channel area.
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10.
公开(公告)号:US20170084755A1
公开(公告)日:2017-03-23
申请号:US15367568
申请日:2016-12-02
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Jongchan LEE , Yoonho KHANG , Myounghwa KIM , Joonhwa BAE , Myounggeun CHA
IPC: H01L29/786 , H01L29/66 , H01L21/02 , H01L21/3205 , H01L29/45 , H01L27/12
CPC classification number: H01L21/823418 , H01L21/02422 , H01L21/02488 , H01L21/02532 , H01L21/02592 , H01L21/02667 , H01L21/02672 , H01L21/28518 , H01L21/32053 , H01L27/1222 , H01L27/1274 , H01L27/1277 , H01L27/3262 , H01L29/41733 , H01L29/458 , H01L29/66765 , H01L29/78618 , H01L29/78678
Abstract: A thin film transistor includes a polysilicon layer on a substrate, which includes a first area between second and third areas. A polysilicon layer is formed on the substrate, and a source electrode and a drain electrode are formed on the polysilicon layer in the first and third areas. Each of the source electrode and the drain electrode includes a metal silicide layer adjacent the polysilicon layer.
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