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公开(公告)号：US20230413620A1
公开(公告)日：2023-12-21
申请号：US18460345
申请日：2023-09-01
发明人： Eunhyun KIM , Eunhye KO , Yeonhong KIM , Kyoungwon LEE , Sunhee LEE , Junhyung LIM
IPC分类号： H10K59/126 , H10K59/131
CPC分类号： H10K59/126 , H10K59/131 , H10K77/111
摘要： A display apparatus in which an area of a peripheral area may be reduced while having a simple structure, the display apparatus includes a substrate, a bottom metal layer on the substrate and including a first extension line extending from the peripheral area outside a display area into the display area, a semiconductor layer on the bottom metal layer, a gate layer on the semiconductor layer, a first metal layer on the gate layer, and a second metal layer on the first metal layer and including a first data line extending from the peripheral area into the display area and electrically coupled to the first extension line in the peripheral area.
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公开(公告)号：US20200176576A1
公开(公告)日：2020-06-04
申请号：US16781081
申请日：2020-02-04
发明人： Jongchan LEE , Taehoon YANG , Woonghee JEONG , Kyoungwon LEE , Yongsu LEE
IPC分类号： H01L29/417 , H01L27/12 , H01L29/786 , H01L29/66
摘要： A display device includes a first insulation layer on a first gate electrode, an active pattern on the first insulation layer and including an NMOS area and a PMOS area, the PMOS area overlapping the first gate electrode, a second insulation layer on the active pattern. The active pattern includes an NMOS area and a PMOS area, with the PMOS area overlapping the first gate electrode. In addition, a second gate electrode is on the second insulation layer and overlaps the NMOS area. An active-protecting pattern is in the same layer as the second gate electrode and passes through the second insulation layer to contact the PMOS area. A third insulation layer is on the active-protecting pattern and the second gate electrode. A data metal electrode passes through the third insulation layer and contacts the active-protecting pattern.
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公开(公告)号：US20190266967A1
公开(公告)日：2019-08-29
申请号：US16407324
申请日：2019-05-09
发明人： Kyoungwon LEE , Kwan-young OH , Jimyoung SEO , Bonghyun YOU , Junghwan CHO , Sangsu HAN
IPC分类号： G09G3/36
摘要： A display apparatus includes a display panel, a timing controller, a data driver, and a gate driver. The timing controller receives image data at a number of frames per second of a first level and generates a gate control signal and a data control signal. The timing controller includes an image converter that operates in film mode or normal mode when the input image data are moving image data, and that outputs film image data at a number of frames per second of second level lower than the first level during the film mode. The data driver applies a data voltage corresponding to the film image data to the display panel based on the data control signal. The gate driver applies a gate voltage to the display panel based on the gate control signal. The display panel operates at a frequency of the second level during the film mode.
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公开(公告)号：US20180366525A1
公开(公告)日：2018-12-20
申请号：US15870095
申请日：2018-01-12
发明人： Jongchan LEE , Taehoon YANG , Woonghee JEONG , Kyoungwon LEE , Yongsu LEE
CPC分类号： H01L29/41783 , H01L27/1222 , H01L27/1251 , H01L27/127 , H01L29/66575 , H01L29/66696 , H01L29/78675 , H01L29/78678
摘要： A display device includes a first insulation layer on a first gate electrode, an active pattern on the first insulation layer and including an NMOS area and a PMOS area, the PMOS area overlapping the first gate electrode, a second insulation layer on the active pattern. The active pattern includes an NMOS area and a PMOS area, with the PMOS area overlapping the first gate electrode. In addition, a second gate electrode is on the second insulation layer and overlaps the NMOS area. An active-protecting pattern is in the same layer as the second gate electrode and passes through the second insulation layer to contact the PMOS area. A third insulation layer is on the active-protecting pattern and the second gate electrode. A data metal electrode passes through the third insulation layer and contacts the active-protecting pattern.
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公开(公告)号：US20160063962A1
公开(公告)日：2016-03-03
申请号：US14755241
申请日：2015-06-30
发明人： Suhyeong PARK , Kyoungwon LEE , Hoyong JUNG , Cheolwoo PARK , Bonghyun YOU
IPC分类号： G09G5/18
CPC分类号： G09G3/3611 , G09G3/3666 , G09G3/3685 , G09G3/3696 , G09G2310/0221 , G09G2310/0281 , G09G2330/02 , G09G2330/021 , G09G2330/022 , G09G2370/08
摘要： A display apparatus includes: a timing control block which outputs image data based on external image data and control signals, and generates data and gate-side control signals based on the external control signal; a source drive block which converts the image data into a data voltage based on the data control signal; a low frequency detection block which detects a low power drive period based on the external control signal and generates a power control signal, a state of which is determined based on a result of the detection; an integrated chip which receives first and second drive voltages and includes a first switch block that turns off a circuit of the source drive block based on the power control signal during the low power drive period; a gate drive circuit which generates a gate signal based on a gate control signal from the integrated chip; and a display panel.
摘要翻译： 显示装置包括：定时控制块，其基于外部图像数据和控制信号输出图像数据，并且基于外部控制信号生成数据和门极控制信号; 源驱动块，其基于数据控制信号将图像数据转换为数据电压; 低频检测块，其基于所述外部控制信号检测低功率驱动周期，并产生其状态基于所述检测结果确定的功率控制信号; 接收第一和第二驱动电压的集成芯片，并且包括在低功率驱动周期期间基于功率控制信号关闭源驱动块的电路的第一开关块; 栅极驱动电路，其基于来自所述集成芯片的栅极控制信号生成栅极信号; 和显示面板。
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公开(公告)号：US20180366493A1
公开(公告)日：2018-12-20
申请号：US15869748
申请日：2018-01-12
发明人： Woonghee JEONG , Taehoon YANG , Kyoungwon LEE , Jongchan LEE , Yongsu LEE
IPC分类号： H01L27/12 , H01L27/092 , H01L29/45 , H01L27/32
CPC分类号： H01L27/124 , H01L27/3258 , H01L27/3276 , H01L29/78621
摘要： A display device includes a common active pattern, a first gate electrode, and a second gate electrode. The common active pattern includes an NMOS area, a PMOS area, and a silicide area in a same layer as the NMOS area and the PMOS area. The silicide area electrically connects the NMOS area to the PMOS area. The NMOS area includes a first channel area and an n-doped area contacting the first channel area. The PMOS area includes a second channel area and a p-doped area contacting the second channel area. The first gate electrode overlaps the first channel area, and the second gate electrode overlaps the second channel area.
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7.发明申请THIN FILM TRANSISTOR SUBSTRATE, DISPLAY APPARATUS COMPRISING THE SAME, METHOD OF MANUFACTURING THIN FILM TRANSISTOR SUBSTRATE, AND METHOD OF MANUFACTURING DISPLAY APPARATUS 有权薄膜晶体管基板，包括其的显示装置，制造薄膜晶体管基板的方法和制造显示装置的方法公开(公告)号：US20160093646A1
公开(公告)日：2016-03-31
申请号：US14689927
申请日：2015-04-17
发明人： Myounggeun CHA , Dongjo KIM , Yoonho KHANG , Myounghwa KIM , Kyoungwon LEE
IPC分类号： H01L27/12 , H01L29/66 , H01L29/786
CPC分类号： H01L27/1255 , H01L27/1274 , H01L29/66757 , H01L29/66765 , H01L29/78645 , H01L29/78648 , H01L29/78675 , H01L29/78678
摘要： A thin film transistor (TFT) substrate, a flat display apparatus including the TFT substrate, a method of manufacturing the TFT substrate, and a method of manufacturing the flat display apparatus, the thin film transistor (TFT) substrate including a substrate; a first gate electrode on the substrate, the first gate electrode including a first branch electrode and a second branch electrode that are spaced apart from one another; a polysilicon layer on the first gate electrode and insulated from the first gate electrode; and a second gate electrode on the polysilicon layer, the second gate electrode being insulated from the polysilicon layer and overlying the first and second branch electrodes.
摘要翻译： 薄膜晶体管（TFT）基板，包括TFT基板的平面显示装置，TFT基板的制造方法以及制造平面显示装置的方法，所述薄膜晶体管（TFT）基板包括基板; 在所述基板上的第一栅电极，所述第一栅极包括彼此间隔开的第一分支电极和第二分支电极; 在所述第一栅电极上并与所述第一栅电极绝缘的多晶硅层; 以及在所述多晶硅层上的第二栅电极，所述第二栅电极与所述多晶硅层绝缘并且覆盖所述第一和第二分支电极。
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8.发明申请THIN FILM TRANSISTOR SUBSTRATE, DISPLAY APPARATUS, METHOD FOR MANUFACTURING THE THIN FILM TRANSISTOR SUBSTRATE, AND METHOD FOR MANUFACTURING THE DISPLAY APPARATUS 审中-公开薄膜晶体管基板，显示装置，制造薄膜晶体管基板的方法和制造显示装置的方法公开(公告)号：US20160013323A1
公开(公告)日：2016-01-14
申请号：US14565880
申请日：2014-12-10
发明人： Woonghee JEONG , Yoonho KHANG , Myounghwa KIM , Youngki SHIN , Kyoungwon LEE
IPC分类号： H01L29/786 , H01L27/12 , H01L29/66
CPC分类号： H01L29/78603 , H01L27/1222 , H01L27/1274 , H01L29/66757 , H01L29/78675
摘要： A thin film transistor substrate includes a substrate, an anodized aluminum layer on the substrate, a polycrystalline silicon layer covering the anodized aluminum layer, and an insulating layer covering the polycrystalline silicon layer.
摘要翻译： 薄膜晶体管衬底包括衬底，衬底上的阳极氧化铝层，覆盖阳极化铝层的多晶硅层和覆盖多晶硅层的绝缘层。
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公开(公告)号：US20190280021A1
公开(公告)日：2019-09-12
申请号：US16286744
申请日：2019-02-27
发明人： Kyoungwon LEE , Taehoon YANG , Jongchan LEE , Woonghee JEONG , Yongsu LEE
IPC分类号： H01L27/12 , H01L29/786 , H01L29/66
摘要： A thin film transistor substrate, a display device, a method of manufacturing a thin film transistor substrate, and a method of manufacturing a display device, the thin film transistor substrate including a substrate; a first thin film transistor on the substrate, the first thin film transistor including a first active pattern, and a first gate electrode arranged to overlap at least a part of the first active pattern; and a second thin film transistor on the substrate, the second thin film transistor including a second active pattern that includes a plurality of protrusions on an upper surface thereof, and a second gate electrode arranged to overlap at least a part of the second active pattern.
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10.发明申请公开(公告)号：US20190181360A1
公开(公告)日：2019-06-13
申请号：US16202595
申请日：2018-11-28
发明人： Myounggeun CHA , Sanggun CHOI , Meejae KANG , Sanggab KIM , Joon woo BAE , Thanh Tien NGUYEN , Kyoungwon LEE , Yongsu LEE
摘要： A display substrate includes a first conductive layer on a base substrate, a first insulation layer on the first conductive layer, a second conductive layer on the first insulation layer, a second insulation layer on the second conductive layer, and a third conductive layer on the second insulation layer. The third conductive layer is connected to the first conductive layer and the second conductive layer through a contact hole passing through the first insulation layer, the second conductive layer, and the second insulation layer. A sidewall of the contact hole has a stepped shape.
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