公开(公告)号：US09142400B1

公开(公告)日：2015-09-22

申请号：US13944808

申请日：2013-07-17

Applicant: STC.UNM

Inventor： Steven R. J. Brueck ,  Stephen D. Hersee ,  Seung-Chang Lee ,  Daniel Feezell

IPC: H01L29/06 ,  H01L21/02 ,  H01L27/12

CPC classification number: H01L21/02107 ,  B82Y10/00 ,  B82Y40/00 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02538 ,  H01L21/02639 ,  H01L27/1211 ,  H01L29/045 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/66469 ,  H01L29/66795 ,  H01L29/775 ,  H01L29/7783 ,  H01L29/785

Abstract: A method for making a heteroepitaxial layer. The method comprises providing a semiconductor substrate. A seed area delineated with a selective growth mask is formed on the semiconductor substrate. The seed area comprises a first material and has a linear surface dimension of less than 100 nm. A heteroepitaxial layer is grown on the seed area, the heteroepitaxial layer comprising a second material that is different from the first material. Devices made by the method are also disclosed.

Abstract translation: 一种制造异质外延层的方法。 该方法包括提供半导体衬底。 在半导体衬底上形成用选择性生长掩模描绘的种子区域。 种子区域包括第一材料并且具有小于100nm的线性表面尺寸。 在种子区域上生长异质外延层，异质外延层包含不同于第一材料的第二材料。 还公开了通过该方法制造的器件。

公开(公告)号：US20130175501A1

公开(公告)日：2013-07-11

申请号：US13783219

申请日：2013-03-01

Applicant: STC.UNM

Inventor： Stephen D. Hersee ,  Xin Wang ,  Xinyu Sun

IPC: H01L21/02 ,  H01L29/20 ,  H01L29/04

CPC classification number: H01L29/413 ,  B82Y10/00 ,  B82Y20/00 ,  B82Y30/00 ,  C30B29/60 ,  H01L21/0237 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02573 ,  H01L21/02603 ,  H01L21/02609 ,  H01L21/02612 ,  H01L21/0262 ,  H01L21/02636 ,  H01L21/02639 ,  H01L21/02642 ,  H01L29/045 ,  H01L29/0676 ,  H01L29/2003 ,  H01L29/775 ,  H01L31/0304 ,  H01L31/035236 ,  H01L31/184 ,  H01L33/18 ,  H01L33/24 ,  H01L2221/1094 ,  H01L2924/0002 ,  H01S5/1042 ,  H01S5/1835 ,  H01S5/18369 ,  H01S5/3428 ,  Y02E10/544 ,  Y02P70/521 ,  Y10S977/762 ,  Y10S977/816 ,  Y10T428/24612 ,  H01L2924/00

Abstract: Exemplary embodiments provide semiconductor devices including high-quality (i.e., defect free) group III-N nanowires and uniform group III-N nanowire arrays as well as their scalable processes for manufacturing, where the position, orientation, cross-sectional features, length and the crystallinity of each nanowire can be precisely controlled. A pulsed growth mode can be used to fabricate the disclosed group III-N nanowires and/or nanowire arrays providing a uniform length of about 10 nm to about 1000 microns with constant cross-sectional features including an exemplary diameter of about 10-1000 nm. In addition, high-quality GaN substrate structures can be formed by coalescing the plurality of GaN nanowires and/or nanowire arrays to facilitate the fabrication of visible LEDs and lasers. Furthermore, core-shell nanowire/MQW active structures can be formed by a core-shell growth on the nonpolar sidewalls of each nanowire.

Abstract translation: 示例性实施例提供包括高质量（即，无缺陷）III-N族纳米线和均匀III-N纳米线阵列的半导体器件及其可制造的可扩展工艺，其中位置，取向，横截面特征，长度和 可以精确地控制每个纳米线的结晶度。 可以使用脉冲生长模式来制造公开的提供约10nm至约1000微米的均匀长度的III-N族纳米线和/或纳米线阵列，其具有恒定的横截面特征，包括约10-1000nm的示例性直径。 此外，可以通过聚结多个GaN纳米线和/或纳米线阵列来形成高质量的GaN衬底结构，以便制造可见的LED和激光器。 此外，核 - 壳纳米线/ MQW活性结构可以通过在每个纳米线的非极性侧壁上的核 - 壳生长形成。

公开(公告)号：US20200212198A1

公开(公告)日：2020-07-02

申请号：US16746853

申请日：2020-01-18

Applicant: STC.UNM

Inventor： Steven R.J. Brueck ,  Stephen D. Hersee ,  Seung-Chang Lee ,  Daniel Feezell

IPC: H01L29/66 ,  H01L29/06 ,  B82Y40/00 ,  H01L21/02 ,  H01L29/78 ,  H01L29/16 ,  H01L29/775 ,  B82Y10/00 ,  H01L29/04 ,  H01L29/778 ,  H01L29/20

Abstract: A method for making a heteroepitaxial layer. The method comprises providing a semiconductor substrate. A seed area delineated with a selective growth mask is formed on the semiconductor substrate. The seed area comprises a first material and has a linear surface dimension of less than 100 nm. A heteroepitaxial layer is grown on the seed area, the heteroepitaxial layer comprising a second material that is different from the first material. Devices made by the method are also disclosed.

公开(公告)号：US08658519B1

公开(公告)日：2014-02-25

申请号：US13677203

申请日：2012-11-14

Applicant: STC.UNM

Inventor： Stephen D. Hersee

IPC: H01L21/20

CPC classification number: H01L29/0676 ,  H01L21/02439 ,  H01L21/02488 ,  H01L21/0254 ,  H01L21/02603 ,  H01L21/02609 ,  H01L21/02639 ,  H01L29/2003 ,  H01L29/7787

Abstract: Various embodiments provide non-planar nanowires, nanowire arrays, and nanowire networks as well as methods of their formation and applications. The non-planar nanowires and their arrays can be formed in a controlled manner on surfaces having a non-planar orientation. In embodiments, two or more adjacent nanowires from different surfaces can grow to merge together forming one or more nanowire branches and thus forming a nanowire network. In embodiments, the non-planar nanowires and nanowire networks can be used for cantilever oscillation, switching and transistor actions.

Abstract translation: 各种实施例提供非平面纳米线，纳米线阵列和纳米线网络以及它们的形成和应用的方法。 非平面纳米线及其阵列可以以受控的方式形成在具有非平面取向的表面上。 在实施例中，来自不同表面的两个或更多个相邻的纳米线可以生长以合并在一起形成一个或多个纳米线分支，从而形成纳米线网络。 在实施例中，非平面纳米线和纳米线网络可用于悬臂振荡，开关和晶体管动作。

公开(公告)号：US20200161449A1

公开(公告)日：2020-05-21

申请号：US16748361

申请日：2020-01-21

Applicant: STC.UNM

Inventor： Steven R.J. Brueck ,  Stephen D. Hersee ,  Seung-Chang Lee ,  Daniel Feezell

IPC: H01L29/66 ,  H01L21/02 ,  H01L29/78 ,  B82Y40/00 ,  H01L29/04 ,  H01L29/06 ,  H01L29/775 ,  H01L29/20 ,  H01L29/778 ,  B82Y10/00 ,  H01L29/16

Abstract: A method for making a heteroepitaxial layer. The method comprises providing a semiconductor substrate. A seed area delineated with a selective growth mask is formed on the semiconductor substrate. The seed area comprises a first material and has a linear surface dimension of less than 100 nm. A heteroepitaxial layer is grown on the seed area, the heteroepitaxial layer comprising a second material that is different from the first material. Devices made by the method are also disclosed.

公开(公告)号：US20200161448A1

公开(公告)日：2020-05-21

申请号：US16748327

申请日：2020-01-21

Applicant: STC.UNM

Inventor： Steven R.J. Brueck ,  Stephen D. Hersee ,  Seung-Chang Lee ,  Daniel Feezell

IPC: H01L29/66 ,  H01L21/02 ,  H01L29/78 ,  B82Y40/00 ,  H01L29/04 ,  H01L29/06 ,  H01L29/775 ,  H01L29/20 ,  H01L29/778 ,  B82Y10/00 ,  H01L29/16

Abstract: A method for making a heteroepitaxial layer. The method comprises providing a semiconductor substrate. A seed area delineated with a selective growth mask is formed on the semiconductor substrate. The seed area comprises a first material and has a linear surface dimension of less than 100 nm. A heteroepitaxial layer is grown on the seed area, the heteroepitaxial layer comprising a second material that is different from the first material. Devices made by the method are also disclosed.