公开(公告)号：US20150137334A1

公开(公告)日：2015-05-21

申请号：US14600825

申请日：2015-01-20

Applicant: STATS ChipPAC, Ltd.

Inventor： SinJae Lee ,  JinGwan Kim ,  JiHoon Oh ,  JaeHyun Lim ,  KyuWon Lee

IPC: H01L25/065 ,  H01L23/552 ,  H01L21/768 ,  H01L21/56 ,  H01L23/48 ,  H01L25/00 ,  H01L23/31

CPC classification number: H01L25/0657 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/56 ,  H01L21/76898 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/552 ,  H01L24/48 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06537 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06572 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15156 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device has an interconnect structure with a cavity formed partially through the interconnect structure. A first semiconductor die is mounted in the cavity. A first TSV is formed through the first semiconductor die. An adhesive layer is deposited over the interconnect structure and first semiconductor die. A shielding layer is mounted over the first semiconductor die. The shielding layer is secured to the first semiconductor die with the adhesive layer and grounded through the first TSV and interconnect structure to block electromagnetic interference. A second semiconductor die is mounted to the shielding layer and electrically connected to the interconnect structure. A second TSV is formed through the second semiconductor die. An encapsulant is deposited over the shielding layer, second semiconductor die, and interconnect structure. A slot is formed through the shielding layer for the encapsulant to flow into the cavity and cover the first semiconductor die.

Abstract translation: 半导体器件具有互连结构，其中腔部分地穿过互连结构形成。 第一半导体管芯安装在空腔中。 通过第一半导体管芯形成第一TSV。 在互连结构和第一半导体管芯上沉积粘合剂层。 屏蔽层安装在第一半导体管芯上。 屏蔽层通过粘合剂层固定到第一半导体管芯，并通过第一TSV和互连结构接地以阻止电磁干扰。 第二半导体管芯安装到屏蔽层并电连接到互连结构。 通过第二半导体管芯形成第二TSV。 密封剂沉积在屏蔽层，第二半导体管芯和互连结构之上。 通过屏蔽层形成狭缝以使密封剂流入空腔并覆盖第一半导体管芯。

公开(公告)号：US08932908B2

公开(公告)日：2015-01-13

申请号：US13896635

申请日：2013-05-17

Applicant: STATS ChipPAC, Ltd.

Inventor： KyuWon Lee ,  HyunSu Shin ,  Hun Jeong ,  JinGwan Kim ,  SunYoung Chun

IPC: H01L21/44 ,  H01L21/48 ,  H01L21/50 ,  H01L21/52 ,  H01L21/56 ,  H01L23/00 ,  H01L25/10 ,  H01L25/00 ,  H01L23/48 ,  H01L23/31

CPC classification number: H01L21/52 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/48 ,  H01L24/10 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L24/94 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/1718 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2224/94 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00011 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2224/81805

Abstract: A semiconductor device has a substrate with a die attach area. A conductive layer is formed over a surface of the substrate and extending below the surface. An insulating layer is formed over the surface of the substrate outside the die attach area. A portion of the conductive layer is removed within the die attach area to expose sidewalls of the substrate. The remaining portion of the conductive layer is recessed below the surface of the substrate within the die attach area. A semiconductor die has bumps formed over its active surface. The semiconductor die is mounted to the substrate by bonding the bumps to the remaining portion of the first conductive layer recessed below the first surface of the substrate. The sidewalls of the substrate retain the bumps during bonding to the remaining portion of the conductive layer. An encapsulant is deposited between the semiconductor die and substrate.

Abstract translation: 半导体器件具有具有管芯附着区域的衬底。 导电层形成在衬底的表面上并在表面下方延伸。 在芯片附着区域外部的基板的表面上形成绝缘层。 导电层的一部分在管芯附着区域内去除以暴露衬底的侧壁。 导电层的剩余部分在芯片附着区域内凹陷在基板的表面下方。 半导体管芯在其有效表面上形成凸块。 半导体管芯通过将凸起焊接到凹陷在基板的第一表面下方的第一导电层的剩余部分而安装到基板。 在与导电层的剩余部分接合期间，衬底的侧壁保持凸块。 密封剂沉积在半导体管芯和衬底之间。

公开(公告)号：US09401347B2

公开(公告)日：2016-07-26

申请号：US14600825

申请日：2015-01-20

Applicant: STATS ChipPAC, Ltd.

Inventor： SinJae Lee ,  JinGwan Kim ,  JiHoon Oh ,  JaeHyun Lim ,  KyuWon Lee

IPC: H01L25/065 ,  H01L25/00 ,  H01L23/552 ,  H01L23/31 ,  H01L21/56 ,  H01L23/48 ,  H01L21/768 ,  H01L21/48 ,  H01L23/498 ,  H01L23/00

CPC classification number: H01L25/0657 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/56 ,  H01L21/76898 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/552 ,  H01L24/48 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06537 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06572 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15156 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device has an interconnect structure with a cavity formed partially through the interconnect structure. A first semiconductor die is mounted in the cavity. A first TSV is formed through the first semiconductor die. An adhesive layer is deposited over the interconnect structure and first semiconductor die. A shielding layer is mounted over the first semiconductor die. The shielding layer is secured to the first semiconductor die with the adhesive layer and grounded through the first TSV and interconnect structure to block electromagnetic interference. A second semiconductor die is mounted to the shielding layer and electrically connected to the interconnect structure. A second TSV is formed through the second semiconductor die. An encapsulant is deposited over the shielding layer, second semiconductor die, and interconnect structure. A slot is formed through the shielding layer for the encapsulant to flow into the cavity and cover the first semiconductor die.

公开(公告)号：US20130249090A1

公开(公告)日：2013-09-26

申请号：US13896635

申请日：2013-05-17

Applicant: STATS ChipPAC, Ltd.

Inventor： KyuWon Lee ,  HyunSu Shin ,  Hun Jeong ,  JinGwan Kim ,  SunYoung Chun

IPC: H01L21/52 ,  H01L23/48 ,  H01L23/00

CPC classification number: H01L21/52 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/48 ,  H01L24/10 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L24/94 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/1718 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2224/94 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00011 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2224/81805

Abstract: A semiconductor device has a substrate with a die attach area. A conductive layer is formed over a surface of the substrate and extending below the surface. An insulating layer is formed over the surface of the substrate outside the die attach area. A portion of the conductive layer is removed within the die attach area to expose sidewalls of the substrate. The remaining portion of the conductive layer is recessed below the surface of the substrate within the die attach area. A semiconductor die has bumps formed over its active surface. The semiconductor die is mounted to the substrate by bonding the bumps to the remaining portion of the first conductive layer recessed below the first surface of the substrate. The sidewalls of the substrate retain the bumps during bonding to the remaining portion of the conductive layer. An encapsulant is deposited between the semiconductor die and substrate.

Abstract translation: 半导体器件具有具有管芯附着区域的衬底。 导电层形成在衬底的表面上并在表面下方延伸。 在芯片附着区域外部的基板的表面上形成绝缘层。 导电层的一部分在管芯附着区域内去除以暴露衬底的侧壁。 导电层的剩余部分在芯片附着区域内凹陷在基板的表面下方。 半导体管芯在其有效表面上形成凸块。 半导体管芯通过将凸起焊接到凹陷在基板的第一表面下方的第一导电层的剩余部分而安装到基板。 在与导电层的剩余部分接合期间，衬底的侧壁保持凸块。 密封剂沉积在半导体管芯和衬底之间。

公开(公告)号：US08937371B2

公开(公告)日：2015-01-20

申请号：US13935312

申请日：2013-07-03

Applicant: STATS ChipPAC, Ltd.

Inventor： SinJae Lee ,  JinGwan Kim ,  JiHoon Oh ,  JaeHyun Lim ,  KyuWon Lee

IPC: H01L23/552 ,  H01L21/48 ,  H01L23/498 ,  H01L25/065 ,  H01L23/31 ,  H01L23/48 ,  H01L23/00

CPC classification number: H01L25/0657 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/56 ,  H01L21/76898 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/552 ,  H01L24/48 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06537 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06572 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15156 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device has an interconnect structure with a cavity formed partially through the interconnect structure. A first semiconductor die is mounted in the cavity. A first TSV is formed through the first semiconductor die. An adhesive layer is deposited over the interconnect structure and first semiconductor die. A shielding layer is mounted over the first semiconductor die. The shielding layer is secured to the first semiconductor die with the adhesive layer and grounded through the first TSV and interconnect structure to block electromagnetic interference. A second semiconductor die is mounted to the shielding layer and electrically connected to the interconnect structure. A second TSV is formed through the second semiconductor die. An encapsulant is deposited over the shielding layer, second semiconductor die, and interconnect structure. A slot is formed through the shielding layer for the encapsulant to flow into the cavity and cover the first semiconductor die.

Abstract translation: 半导体器件具有互连结构，其中腔部分地穿过互连结构形成。 第一半导体管芯安装在空腔中。 通过第一半导体管芯形成第一TSV。 在互连结构和第一半导体管芯上沉积粘合剂层。 屏蔽层安装在第一半导体管芯上。 屏蔽层通过粘合剂层固定到第一半导体管芯，并通过第一TSV和互连结构接地以阻止电磁干扰。 第二半导体管芯安装到屏蔽层并电连接到互连结构。 通过第二半导体管芯形成第二TSV。 密封剂沉积在屏蔽层，第二半导体管芯和互连结构之上。 通过屏蔽层形成狭缝以使密封剂流入空腔并覆盖第一半导体管芯。

公开(公告)号：US20140008783A1

公开(公告)日：2014-01-09

申请号：US14021740

申请日：2013-09-09

Applicant: STATS ChipPAC, Ltd.

Inventor： SungWon Cho ,  TaeWoo Lee ,  DaeSik Choi ,  KyuWon Lee

IPC: H01L23/48

CPC classification number: H01L23/48 ,  H01L24/05 ,  H01L24/16 ,  H01L24/29 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/0401 ,  H01L2224/05557 ,  H01L2224/05568 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/16225 ,  H01L2224/165 ,  H01L2224/29 ,  H01L2224/29099 ,  H01L2224/29101 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29298 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81101 ,  H01L2224/81193 ,  H01L2224/83889 ,  H01L2224/92125 ,  H01L2924/00011 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/01083 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/05552 ,  H01L2224/81805

Abstract: A semiconductor device has a flipchip type semiconductor die with contact pads and substrate with contact pads. A flux material is deposited over the contact pads of the semiconductor die and contact pads of the substrate. A solder tape formed as a continuous body of solder material with a plurality of recesses is disposed between the contact pads of the semiconductor die and substrate. The solder tape is brought to a liquidus state to separate a portion of the solder tape outside a footprint of the contact pads of the semiconductor die and substrate under surface tension and coalesce the solder material as an electrical interconnect substantially within the footprint of the contact pads of the semiconductor die and substrate. The contact pads on the semiconductor die and substrate can be formed with an extension or recess to increase surface area of the contact pads.

Abstract translation: 半导体器件具有带有接触焊盘和具有接触焊盘的衬底的倒装芯片型半导体管芯。 焊剂材料沉积在半导体管芯的接触焊盘和衬底的接触焊盘上。 形成为具有多个凹部的焊料材料的连续体的焊料带设置在半导体管芯和衬底的接触焊盘之间。 焊带被带到液相线状态，以将表面张力下的半导体管芯和衬底的接触焊盘的一部分焊接区分隔开，并将焊料材料作为基本上在接触焊盘的覆盖区内的电互连 的半导体管芯和衬底。 半导体管芯和衬底上的接触焊盘可以形成有延伸部或凹部，以增加接触焊盘的表面积。

公开(公告)号：US20130292804A1

公开(公告)日：2013-11-07

申请号：US13935312

申请日：2013-07-03

Applicant: STATS ChipPAC, Ltd.

Inventor： SinJae Lee ,  JinGwan Kim ,  JiHoon Oh ,  JaeHyun Lim ,  KyuWon Lee

IPC: H01L23/552

CPC classification number: H01L25/0657 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/56 ,  H01L21/76898 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/552 ,  H01L24/48 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06537 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06572 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15156 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device has an interconnect structure with a cavity formed partially through the interconnect structure. A first semiconductor die is mounted in the cavity. A first TSV is formed through the first semiconductor die. An adhesive layer is deposited over the interconnect structure and first semiconductor die. A shielding layer is mounted over the first semiconductor die. The shielding layer is secured to the first semiconductor die with the adhesive layer and grounded through the first TSV and interconnect structure to block electromagnetic interference. A second semiconductor die is mounted to the shielding layer and electrically connected to the interconnect structure. A second TSV is formed through the second semiconductor die. An encapsulant is deposited over the shielding layer, second semiconductor die, and interconnect structure. A slot is formed through the shielding layer for the encapsulant to flow into the cavity and cover the first semiconductor die.

Abstract translation: 半导体器件具有互连结构，其中腔部分地穿过互连结构形成。 第一半导体管芯安装在空腔中。 通过第一半导体管芯形成第一TSV。 在互连结构和第一半导体管芯上沉积粘合剂层。 屏蔽层安装在第一半导体管芯上。 屏蔽层通过粘合剂层固定到第一半导体管芯，并通过第一TSV和互连结构接地以阻止电磁干扰。 第二半导体管芯安装到屏蔽层并电连接到互连结构。 通过第二半导体管芯形成第二TSV。 密封剂沉积在屏蔽层，第二半导体管芯和互连结构之上。 通过屏蔽层形成狭缝以使密封剂流入空腔并覆盖第一半导体管芯。