公开(公告)号：US20140008783A1

公开(公告)日：2014-01-09

申请号：US14021740

申请日：2013-09-09

Applicant: STATS ChipPAC, Ltd.

Inventor： SungWon Cho ,  TaeWoo Lee ,  DaeSik Choi ,  KyuWon Lee

IPC: H01L23/48

CPC classification number: H01L23/48 ,  H01L24/05 ,  H01L24/16 ,  H01L24/29 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/0401 ,  H01L2224/05557 ,  H01L2224/05568 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/16225 ,  H01L2224/165 ,  H01L2224/29 ,  H01L2224/29099 ,  H01L2224/29101 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29298 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81101 ,  H01L2224/81193 ,  H01L2224/83889 ,  H01L2224/92125 ,  H01L2924/00011 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/01083 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/05552 ,  H01L2224/81805

Abstract: A semiconductor device has a flipchip type semiconductor die with contact pads and substrate with contact pads. A flux material is deposited over the contact pads of the semiconductor die and contact pads of the substrate. A solder tape formed as a continuous body of solder material with a plurality of recesses is disposed between the contact pads of the semiconductor die and substrate. The solder tape is brought to a liquidus state to separate a portion of the solder tape outside a footprint of the contact pads of the semiconductor die and substrate under surface tension and coalesce the solder material as an electrical interconnect substantially within the footprint of the contact pads of the semiconductor die and substrate. The contact pads on the semiconductor die and substrate can be formed with an extension or recess to increase surface area of the contact pads.

Abstract translation: 半导体器件具有带有接触焊盘和具有接触焊盘的衬底的倒装芯片型半导体管芯。 焊剂材料沉积在半导体管芯的接触焊盘和衬底的接触焊盘上。 形成为具有多个凹部的焊料材料的连续体的焊料带设置在半导体管芯和衬底的接触焊盘之间。 焊带被带到液相线状态，以将表面张力下的半导体管芯和衬底的接触焊盘的一部分焊接区分隔开，并将焊料材料作为基本上在接触焊盘的覆盖区内的电互连 的半导体管芯和衬底。 半导体管芯和衬底上的接触焊盘可以形成有延伸部或凹部，以增加接触焊盘的表面积。

公开(公告)号：US20150357274A1

公开(公告)日：2015-12-10

申请号：US14832644

申请日：2015-08-21

Applicant: STATS ChipPAC, Ltd.

Inventor： DaeSik Choi ,  Young Jin Woo ,  TaeWoo Lee

IPC: H01L23/498 ,  H01L25/065 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L21/78 ,  H01L21/561 ,  H01L21/568 ,  H01L23/147 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/16 ,  H01L24/17 ,  H01L24/24 ,  H01L24/29 ,  H01L24/48 ,  H01L24/73 ,  H01L24/82 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/24146 ,  H01L2224/24225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/8203 ,  H01L2224/92 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06572 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2224/82 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device has a TSV wafer and semiconductor die mounted over the TSV wafer. A channel is formed through the TSV wafer. An encapsulant is deposited over the semiconductor die and TSV wafer. Conductive TMV are formed through the encapsulant over the conductive TSV and contact pads of the semiconductor die. The conductive TMV can be formed through the channel. A conductive layer is formed over the encapsulant and electrically connected to the conductive TMV. The conductive TMV are formed during the same manufacturing process. An insulating layer is formed over the encapsulant and conductive layer. A plurality of semiconductor die of the same size or different sizes can be stacked over the TSV wafer. The plurality of semiconductor die can be stacked over opposite sides of the TSV wafer. An internal stacking module can be stacked over the semiconductor die and electrically connected through the conductive TMV.

Abstract translation: 半导体器件具有安装在TSV晶片上的TSV晶片和半导体管芯。 通过TSV晶片形成通道。 密封剂沉积在半导体管芯和TSV晶片上。 导电TMV通过半导体芯片的导电TSV和接触焊盘上的密封剂形成。 可以通过通道形成导电TMV。 导电层形成在密封剂上方并与导电TMV电连接。 导电TMV在相同的制造过程中形成。 绝缘层形成在密封剂和导电层之上。 可以在TSV晶片上堆叠相同尺寸或​​不同尺寸的多个半导体管芯。 多个半导体管芯可以堆叠在TSV晶片的相对侧上。 内部堆叠模块可以堆叠在半导体裸片上并通过导电TMV电连接。

公开(公告)号：US20130299973A1

公开(公告)日：2013-11-14

申请号：US13943735

申请日：2013-07-16

Applicant: STATS ChipPAC, Ltd.

Inventor： DaeSik Choi ,  Young Jin Woo ,  TaeWoo Lee

IPC: H01L21/78 ,  H01L23/498

CPC classification number: H01L21/78 ,  H01L21/561 ,  H01L21/568 ,  H01L23/147 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/16 ,  H01L24/17 ,  H01L24/24 ,  H01L24/29 ,  H01L24/48 ,  H01L24/73 ,  H01L24/82 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/24146 ,  H01L2224/24225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/8203 ,  H01L2224/92 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06572 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2224/82 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device has a TSV wafer and semiconductor die mounted over the TSV wafer. A channel is formed through the TSV wafer. An encapsulant is deposited over the semiconductor die and TSV wafer. Conductive TMV are formed through the encapsulant over the conductive TSV and contact pads of the semiconductor die. The conductive TMV can be formed through the channel. A conductive layer is formed over the encapsulant and electrically connected to the conductive TMV. The conductive TMV are formed during the same manufacturing process. An insulating layer is formed over the encapsulant and conductive layer. A plurality of semiconductor die of the same size or different sizes can be stacked over the TSV wafer. The plurality of semiconductor die can be stacked over opposite sides of the TSV wafer. An internal stacking module can be stacked over the semiconductor die and electrically connected through the conductive TMV.

公开(公告)号：US09153494B2

公开(公告)日：2015-10-06

申请号：US13943735

申请日：2013-07-16

Applicant: STATS ChipPAC, Ltd.

Inventor： DaeSik Choi ,  Young Jin Woo ,  TaeWoo Lee

IPC: H01L21/56 ,  H01L21/768 ,  H01L21/78 ,  H01L23/14 ,  H01L23/31 ,  H01L23/498 ,  H01L25/10 ,  H01L23/00

CPC classification number: H01L21/78 ,  H01L21/561 ,  H01L21/568 ,  H01L23/147 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/16 ,  H01L24/17 ,  H01L24/24 ,  H01L24/29 ,  H01L24/48 ,  H01L24/73 ,  H01L24/82 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/24146 ,  H01L2224/24225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/8203 ,  H01L2224/92 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06572 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2224/82 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device has a TSV wafer and semiconductor die mounted over the TSV wafer. A channel is formed through the TSV wafer. An encapsulant is deposited over the semiconductor die and TSV wafer. Conductive TMV are formed through the encapsulant over the conductive TSV and contact pads of the semiconductor die. The conductive TMV can be formed through the channel. A conductive layer is formed over the encapsulant and electrically connected to the conductive TMV. The conductive TMV are formed during the same manufacturing process. An insulating layer is formed over the encapsulant and conductive layer. A plurality of semiconductor die of the same size or different sizes can be stacked over the TSV wafer. The plurality of semiconductor die can be stacked over opposite sides of the TSV wafer. An internal stacking module can be stacked over the semiconductor die and electrically connected through the conductive TMV.

Abstract translation: 半导体器件具有安装在TSV晶片上的TSV晶片和半导体管芯。 通过TSV晶片形成通道。 密封剂沉积在半导体管芯和TSV晶片上。 导电TMV通过半导体芯片的导电TSV和接触焊盘上的密封剂形成。 可以通过通道形成导电TMV。 导电层形成在密封剂上方并与导电TMV电连接。 导电TMV在相同的制造过程中形成。 绝缘层形成在密封剂和导电层之上。 可以在TSV晶片上堆叠相同尺寸或​​不同尺寸的多个半导体管芯。 多个半导体管芯可以堆叠在TSV晶片的相对侧上。 内部堆叠模块可以堆叠在半导体裸片上并通过导电TMV电连接。

公开(公告)号：US09117812B2

公开(公告)日：2015-08-25

申请号：US14138382

申请日：2013-12-23

Applicant: STATS ChipPAC, Ltd.

Inventor： JaeHyun Lee ,  KiYoun Jang ,  KyungHoon Lee ,  TaeWoo Lee

IPC: H01L21/4763 ,  H01L23/12 ,  H01L23/498 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L23/00 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

CPC classification number: H01L23/49816 ,  H01L21/4814 ,  H01L21/486 ,  H01L21/56 ,  H01L21/76802 ,  H01L21/76838 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/3171 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/49894 ,  H01L23/5226 ,  H01L23/5329 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/81 ,  H01L24/94 ,  H01L24/97 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/0346 ,  H01L2224/0401 ,  H01L2224/05571 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1145 ,  H01L2224/1146 ,  H01L2224/11849 ,  H01L2224/13023 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16145 ,  H01L2224/16237 ,  H01L2224/16245 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81385 ,  H01L2224/81815 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/81 ,  H01L2224/11 ,  H01L2924/00012 ,  H01L2224/05552 ,  H01L2224/81805

Abstract: A semiconductor device has a substrate and first conductive layer formed over the substrate. An insulating layer is formed over the first substrate with an opening over the first conductive layer. A second conductive layer is formed within the opening of the insulating layer. A portion of the second conductive layer is removed to expose a horizontal surface and side surfaces of the second conductive layer below a surface of the insulating layer. The second conductive layer has non-linear surfaces to extend a contact area of the second conductive layer. The horizontal surface and side surfaces can be stepped surfaces or formed as a ring. A third conductive layer is formed over the second conductive layer. A plurality of bumps is formed over the horizontal surface and side surfaces of the second conductive layer. A semiconductor die is mounted to the substrate.

Abstract translation: 半导体器件具有衬底和形成在衬底上的第一导电层。 绝缘层在第一基板的上方形成有第一导电层上的开口。 第二导电层形成在绝缘层的开口内。 去除第二导电层的一部分以暴露第二导电层在绝缘层的表面下方的水平表面和侧表面。 第二导电层具有非线性表面以延伸第二导电层的接触面积。 水平表面和侧表面可以是台阶表面或形成为环形。 在第二导电层上形成第三导电层。 在第二导电层的水平表面和侧表面上形成多个凸块。 将半导体管芯安装到基板上。

公开(公告)号：US20140103503A1

公开(公告)日：2014-04-17

申请号：US14138382

申请日：2013-12-23

Applicant: STATS ChipPAC, Ltd.

Inventor： JaeHyun Lee ,  KiYoun Jang ,  KyungHoon Lee ,  TaeWoo Lee

IPC: H01L23/00 ,  H01L23/498

CPC classification number: H01L23/49816 ,  H01L21/4814 ,  H01L21/486 ,  H01L21/56 ,  H01L21/76802 ,  H01L21/76838 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/3171 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/49894 ,  H01L23/5226 ,  H01L23/5329 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/81 ,  H01L24/94 ,  H01L24/97 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/0346 ,  H01L2224/0401 ,  H01L2224/05571 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1145 ,  H01L2224/1146 ,  H01L2224/11849 ,  H01L2224/13023 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16145 ,  H01L2224/16237 ,  H01L2224/16245 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81385 ,  H01L2224/81815 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/81 ,  H01L2224/11 ,  H01L2924/00012 ,  H01L2224/05552 ,  H01L2224/81805

Abstract: A semiconductor device has a substrate and first conductive layer formed over the substrate. An insulating layer is formed over the first substrate with an opening over the first conductive layer. A second conductive layer is formed within the opening of the insulating layer. A portion of the second conductive layer is removed to expose a horizontal surface and side surfaces of the second conductive layer below a surface of the insulating layer. The second conductive layer has non-linear surfaces to extend a contact area of the second conductive layer. The horizontal surface and side surfaces can be stepped surfaces or formed as a ring. A third conductive layer is formed over the second conductive layer. A plurality of bumps is formed over the horizontal surface and side surfaces of the second conductive layer. A semiconductor die is mounted to the substrate.

Abstract translation: 半导体器件具有衬底和形成在衬底上的第一导电层。 绝缘层在第一基板的上方形成有第一导电层上的开口。 第二导电层形成在绝缘层的开口内。 去除第二导电层的一部分以暴露第二导电层在绝缘层的表面下方的水平表面和侧表面。 第二导电层具有非线性表面以延伸第二导电层的接触面积。 水平表面和侧表面可以是台阶表面或形成为环形。 在第二导电层上形成第三导电层。 在第二导电层的水平表面和侧表面上形成多个凸块。 将半导体管芯安装到基板上。