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12 条记录 (耗时 0.021 秒)

    Three-dimensional memory device employing discrete backside openings and methods of making the same
    1.
    发明授权
    Three-dimensional memory device employing discrete backside openings and methods of making the same 有权

    公开(公告)号：US10347654B1

    公开(公告)日：2019-07-09

    申请号：US15977212

    申请日：2018-05-11

    申请人： SANDISK TECHNOLOGIES LLC

    发明人： Takaaki Iwai ,  Shuji Minagawa ,  Hisakazu Otoi

    IPC分类号： H01L27/11582 ,  H01L27/11556 ,  H01L27/1157 ,  H01L27/11565 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11548 ,  H01L27/11575

    摘要： Memory openings and backside openings are formed through an alternating stack of insulating layers and sacrificial material layers over a substrate. Memory opening fill structures are formed in the memory openings, and sacrificial backside opening fill structures are formed in the backside openings. Cavities are formed in volumes of the backside openings by removing the sacrificial backside opening fill structures. Remaining portions of the sacrificial material layers are replaced with material portions including electrically conductive layers. Each electrically conductive layer is formed as a continuous material layer including holes around the backside openings. Each electrically conductive layer is singulated into a plurality of electrically conductive strips by isotropically recessing the electrically conductive layers around each backside opening. Width-modulated cavities including expanded volumes of the backside openings are formed, and are filled with width-modulated insulating wall structures.

    Three-dimensional memory device including through-memory-level via structures and methods of making the same
    6.
    发明授权
    Three-dimensional memory device including through-memory-level via structures and methods of making the same 有权

    公开(公告)号：US11515317B2

    公开(公告)日：2022-11-29

    申请号：US16893995

    申请日：2020-06-05

    申请人： SANDISK TECHNOLOGIES LLC

    发明人： Takaaki Iwai ,  Junpei Kanazawa ,  Hisakazu Otoi ,  Hironori Matsuoka ,  Raiden Matsuno

    IPC分类号： H01L27/11582 ,  H01L27/11539 ,  H01L27/11519 ,  H01L27/11565 ,  H01L27/11556

    摘要： A three-dimensional memory device can include at least one alternating stack of insulating layers and electrically conductive layers located over a semiconductor material layer, memory stack structures vertically extending through the at least one alternating stack, and a vertical stack of dielectric plates interlaced with laterally extending portions of the insulating layers of the at least one alternating stack. A conductive via structure can vertically extend through each dielectric plate and the insulating layers, and can contact an underlying metal interconnect structure. Additionally or alternatively, support pillar structures can vertically extend through the vertical stack of dielectric plates and into an opening through the semiconductor material layer, and can contact lower-level dielectric material layers embedding the underlying metal interconnect structure to enhance structural support to the three-dimensional memory device during manufacture.

    Three-dimensional memory device including split memory cells and methods of forming the same
    8.
    发明授权
    Three-dimensional memory device including split memory cells and methods of forming the same 有权

    公开(公告)号：US10950627B1

    公开(公告)日：2021-03-16

    申请号：US16707541

    申请日：2019-12-09

    申请人： SANDISK TECHNOLOGIES LLC

    发明人： Tatsuya Hinoue ,  Takaaki Iwai ,  Shunsuke Takuma

    IPC分类号： H01L27/11582 ,  H01L27/11519 ,  H01L27/1157 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/11524

    摘要： A three-dimensional memory device includes alternating stacks of insulating layers and electrically conductive layers located over a substrate. Each of the alternating stacks laterally extend along a first horizontal direction, and neighboring pairs of the alternating stacks are laterally spaced apart along a horizontal direction by laterally alternating sequences of memory openings and dielectric pillar structures. Each of the memory openings contains a respective memory opening fill structure that includes a dielectric core, a first vertical semiconductor channel, a second vertical semiconductor channel, a first memory film, and a second memory film. The dielectric core contacts a pair of dielectric pillar structures among the dielectric pillar structures of the laterally alternating sequences.