知搜-全球专利检索

  1. Login
  2. Sign Up

Search Results

10 records (took 0.044 seconds)

    SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
    3.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME 有权
    半导体器件及其制造方法

    公开(公告)号：US20160079246A1

    公开(公告)日：2016-03-17

    申请号：US14849651

    申请日：2015-09-10

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Ji Hun KIM ,  Ilgweon KIM ,  Junhwa SONG ,  Jeonghoon OH ,  WonSeok YOO ,  Eun-Sun LEE

    IPC: H01L27/108 ,  H01L21/311 ,  H01L21/8234 ,  H01L21/308 ,  H01L21/768 ,  H01L49/02 ,  H01L29/06 ,  H01L21/306 ,  H01L21/762 ,  H01L21/02

    CPC classification number: H01L27/10894 ,  H01L21/76224 ,  H01L21/823412 ,  H01L21/823807 ,  H01L27/10805 ,  H01L27/10814 ,  H01L27/10817 ,  H01L27/1085 ,  H01L27/10855 ,  H01L27/10873 ,  H01L27/10891 ,  H01L28/91

    Abstract: A method of fabricating a semiconductor device, the method including etching a portion of a substrate including a first region and a second region to form a device isolation trench; forming a device isolation layer defining active regions by sequentially stacking a first insulating layer, a second insulating layer, and a third insulating layer on an inner surface of the device isolation trench; forming word lines buried in the substrate of the first region, the word lines extending in a first direction to intersect the active region of the first region, the word lines being spaced apart from each other; forming a first mask layer covering the word lines on the substrate of the first region, the first mask layer exposing the substrate of the second region; forming a channel layer on the substrate of the second region; and forming a gate electrode on the channel layer.

    Abstract translation: 一种制造半导体器件的方法，所述方法包括蚀刻包括第一区域和第二区域的衬底的一部分以形成器件隔离沟槽; 通过在器件隔离沟槽的内表面上依次层叠第一绝缘层，第二绝缘层和第三绝缘层，形成限定有源区的器件隔离层; 形成掩埋在第一区域的衬底中的字线，字线在第一方向上延伸以与第一区域的有源区相交，字线彼此间隔开; 形成覆盖第一区域的衬底上的字线的第一掩模层，第一掩模层暴露第二区域的衬底; 在所述第二区域的衬底上形成沟道层; 以及在沟道层上形成栅电极。

    SUBSTRATE ANALYSIS APPARATUS AND SUBSTRATE ANALYSIS METHOD
    5.
    发明申请
    SUBSTRATE ANALYSIS APPARATUS AND SUBSTRATE ANALYSIS METHOD 有权

    公开(公告)号：US20230067060A1

    公开(公告)日：2023-03-02

    申请号：US17690317

    申请日：2022-03-09

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Youn Gon OH ,  Ji Hun KIM ,  Sae Yun KO ,  Gil Ho GU ,  Dong Su KIM ,  Eun Hee LEE ,  Ho Chan LEE ,  Seong Sil JEONG ,  Seong Pyo HONG

    IPC: G01R31/28 ,  H01L21/673 ,  H01L21/677

    Abstract: A substrate analysis apparatus is provided. The substrate analysis includes: an interlayer conveying module configured to transport a first FOUP; an exchange module which is connected to the interlayer conveying module, and configured to transfer a wafer from the first FOUP to a second FOUP; a pre-processing module configured to form a test wafer piece using the wafer inside the second FOUP; an analysis module configured to analyze the test wafer piece; and a transfer rail configured to transport the second FOUP containing the wafer and a tray containing the test wafer piece. The wafer includes a first identifier indicating information corresponding to the wafer, the test wafer piece includes a second identifier indicating information generated by the pre-processing module which corresponds to the test wafer piece, and the analysis module is configured to analyze the first identifier and the second identifier in connection with each other.

    IMAGE SENSOR
    6.
    发明公开
    IMAGE SENSOR 审中-公开

    公开(公告)号：US20230275106A1

    公开(公告)日：2023-08-31

    申请号：US17966576

    申请日：2022-10-14

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Ji Hun KIM ,  Jung Bin YUN ,  Seung Joon LEE

    IPC: H01L27/146

    CPC classification number: H01L27/14614 ,  H01L27/1463 ,  H01L27/14645

    Abstract: An image sensor is provided. The image sensor includes a substrate in which a first photoelectric conversion element is disposed, the substrate having a first surface and a second surface opposite the first surface, pixel separation patterns extending from the first surface of the substrate into the substrate, surrounding the first photoelectric conversion element, and defining a first pixel region in the substrate, a first vertical gate structure which extends in the first pixel region from the first surface of the substrate into the substrate and comprises a first portion disposed in the substrate and a second portion disposed on the first surface of the substrate, a second vertical gate structure which extends in the first pixel region from the first surface of the substrate into the substrate and comprises a first portion disposed in the substrate and a second portion disposed on the first surface of the substrate.

    METHOD FOR REDUCING CURRENT CONSUMPTION, AND ELECTRONIC DEVICE
    7.
    发明申请
    METHOD FOR REDUCING CURRENT CONSUMPTION, AND ELECTRONIC DEVICE 审中-公开

    公开(公告)号：US20200293104A1

    公开(公告)日：2020-09-17

    申请号：US16086084

    申请日：2017-03-17

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Seung Jin KIM ,  Ji Hun KIM ,  Gwang Hui LEE ,  Sung Jun LEE ,  Woo Jun JUNG ,  Min Jung KIM

    IPC: G06F1/3225 ,  G06F3/14 ,  G09G5/393 ,  G09G5/397

    Abstract: Various examples of the present invention relate to an electronic device comprising: a graphic buffer for storing graphic information received from an application; a frame buffer for storing the graphic information to be displayed on a display; and a processor, wherein the processor is configured to: store, in the graphic buffer, first graphic information received from a first layer; store, in the frame buffer, second graphic information received from a second layer; store, in the frame buffer, the first graphic information stored in the graphic buffer; and simultaneously display the first graphic information and the second graphic information, stored in the frame buffer, through the display functionally connected with the processor. In addition, other examples identifiable through the specification are possible.

    SEMICONDUCTOR DEVICE
    9.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20180122810A1

    公开(公告)日：2018-05-03

    申请号：US15621315

    申请日：2017-06-13

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jung Hoon HAN ,  Dong Wan KIM ,  Ji Hun KIM ,  Jae Joon SONG ,  Hiroshi TAKEDA

    IPC: H01L27/108 ,  H01L49/02

    CPC classification number: H01L27/10814 ,  H01L27/10852 ,  H01L27/10894 ,  H01L28/60 ,  H01L28/90

    Abstract: A semiconductor device is provided. The semiconductor device includes an upper interlayer insulating layer disposed on a substrate. A first electrode spaced apart from the upper interlayer insulating layer is disposed on the substrate. A contact structure penetrating the upper interlayer insulating layer is disposed on the substrate. An upper support layer having a first portion covering an upper surface of the upper interlayer insulating layer, to surround an upper side surface of the contact structure, and a second portion extending in a horizontal direction from the first portion and surrounding an upper side surface of the first electrode, is disposed. A dielectric conformally covering the first electrode and a second electrode on the dielectric are disposed.

Patent Agency Ranking