公开(公告)号：US20160079246A1

公开(公告)日：2016-03-17

申请号：US14849651

申请日：2015-09-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ji Hun KIM ,  Ilgweon KIM ,  Junhwa SONG ,  Jeonghoon OH ,  WonSeok YOO ,  Eun-Sun LEE

IPC: H01L27/108 ,  H01L21/311 ,  H01L21/8234 ,  H01L21/308 ,  H01L21/768 ,  H01L49/02 ,  H01L29/06 ,  H01L21/306 ,  H01L21/762 ,  H01L21/02

CPC classification number: H01L27/10894 ,  H01L21/76224 ,  H01L21/823412 ,  H01L21/823807 ,  H01L27/10805 ,  H01L27/10814 ,  H01L27/10817 ,  H01L27/1085 ,  H01L27/10855 ,  H01L27/10873 ,  H01L27/10891 ,  H01L28/91

Abstract: A method of fabricating a semiconductor device, the method including etching a portion of a substrate including a first region and a second region to form a device isolation trench; forming a device isolation layer defining active regions by sequentially stacking a first insulating layer, a second insulating layer, and a third insulating layer on an inner surface of the device isolation trench; forming word lines buried in the substrate of the first region, the word lines extending in a first direction to intersect the active region of the first region, the word lines being spaced apart from each other; forming a first mask layer covering the word lines on the substrate of the first region, the first mask layer exposing the substrate of the second region; forming a channel layer on the substrate of the second region; and forming a gate electrode on the channel layer.

Abstract translation: 一种制造半导体器件的方法，所述方法包括蚀刻包括第一区域和第二区域的衬底的一部分以形成器件隔离沟槽; 通过在器件隔离沟槽的内表面上依次层叠第一绝缘层，第二绝缘层和第三绝缘层，形成限定有源区的器件隔离层; 形成掩埋在第一区域的衬底中的字线，字线在第一方向上延伸以与第一区域的有源区相交，字线彼此间隔开; 形成覆盖第一区域的衬底上的字线的第一掩模层，第一掩模层暴露第二区域的衬底; 在所述第二区域的衬底上形成沟道层; 以及在沟道层上形成栅电极。