SEMICONDUCTOR DEVICE
    1.
    发明公开

    公开(公告)号:US20240074155A1

    公开(公告)日:2024-02-29

    申请号:US18236143

    申请日:2023-08-21

    IPC分类号: H10B12/00

    摘要: A semiconductor device includes a substrate, a bit line extending on the substrate in a first direction, first and second active patterns on the bit line, a back-gate electrode between the first and second active patterns and extending across the bit line and in a second direction that is perpendicular to the first direction, a first word line extending in the second direction at one side of the first active pattern, a second word line extending in the second direction at the other side of the second active pattern, and a contact pattern connected to each of the first and second active patterns, wherein the contact pattern sequentially includes an epitaxial growth layer, a doped polysilicon layer, and a silicide layer.

    SEMICONDUCTOR DEVICE INCLUDING VERTICAL CHANNEL TRANSISTOR, BIT LINE AND PERIPHERAL GATE

    公开(公告)号:US20240170574A1

    公开(公告)日:2024-05-23

    申请号:US18518264

    申请日:2023-11-22

    IPC分类号: H01L29/78 H10B12/00

    摘要: A semiconductor device includes a vertical channel transistor including a vertical channel region extending in a vertical direction and a cell gate electrode facing a first side surface of the vertical channel region. A bit line is electrically connected to the vertical channel transistor at a level that is lower than a level of the vertical channel transistor. A peripheral semiconductor body has at least a portion thereof disposed on a same level as the vertical channel region. Peripheral source/drain regions are disposed in the peripheral semiconductor body and are spaced apart from each other in a horizontal direction. A peripheral channel region is disposed between the peripheral source/drain regions in the peripheral semiconductor body. A peripheral gate is disposed below the peripheral semiconductor body. At least a portion of the peripheral gate is disposed on a same level as at least a portion of the bit line.

    Semiconductor memory devices
    6.
    发明授权

    公开(公告)号:US11653490B2

    公开(公告)日:2023-05-16

    申请号:US17471778

    申请日:2021-09-10

    IPC分类号: H01L27/108

    摘要: A semiconductor memory device including a substrate; a semiconductor pattern extending in a first horizontal direction on the substrate; bit lines extending in a second horizontal direction on the substrate perpendicular to the first horizontal direction, the bit lines being at a first end of the semiconductor pattern; word lines extending in a vertical direction on the substrate at a side of the semiconductor pattern; a capacitor structure on a second end of the semiconductor pattern opposite to the first end in the first horizontal direction, the capacitor structure including a lower electrode connected to the semiconductor pattern, an upper electrode spaced apart from the lower electrode, and a capacitor dielectric layer between the lower electrode and the upper electrode; and a capacitor contact layer between the second end of the semiconductor pattern and the lower electrode and including a pair of convex surfaces in contact with the semiconductor pattern.