公开(公告)号：US20150102282A1

公开(公告)日：2015-04-16

申请号：US14506005

申请日：2014-10-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： LIJIE ZHANG ,  YOUNG-BAE KIM ,  YOUN-SEON KANG ,  IN-GYU BAEK ,  MASAYUKI TERAI

IPC: H01L27/24 ,  H01L45/00

CPC classification number: H01L27/249 ,  H01L27/2454 ,  H01L45/04 ,  H01L45/1226 ,  H01L45/146

Abstract: A semiconductor memory device includes pillars extending upright on a substrate in a direction perpendicular to the substrate, a stack disposed on the substrate and constituted by a first interlayer insulating layer, a first conductive layer, a second interlayer insulating layer, and a second conductive layer, a variable resistance layer interposed between the pillars and the first conductive layer, and an insulating layer interposed between the first pillars and the second conductive layer.

Abstract translation: 半导体存储器件包括在垂直于衬底的方向上在衬底上直立延伸的柱，设置在衬底上并由第一层间绝缘层，第一导电层，第二层间绝缘层和第二导电层 插入在所述柱和所述第一导电层之间的可变电阻层以及插在所述第一柱和所述第二导电层之间的绝缘层。

公开(公告)号：US20210233860A1

公开(公告)日：2021-07-29

申请号：US17230509

申请日：2021-04-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SU-HYUN BARK ,  SANG-HOON AHN ,  YOUNG-BAE KIM ,  HYEOK-SANG OH ,  WOO-JIN LEE ,  HOON-SEOK SEO ,  SUNG-JIN KANG

IPC: H01L23/532 ,  H01L29/16 ,  H01L21/311 ,  H01L21/768 ,  H01L23/528 ,  H01L23/522 ,  H01L29/417 ,  H01L27/088 ,  H01L29/78 ,  H01L23/485 ,  H01L21/8234

Abstract: An integrated circuit device includes a metal film and a complex capping layer covering a top surface of the metal film. The metal film includes a first metal, and penetrates at least a portion of an insulating film formed over a substrate. The complex capping layer includes a conductive alloy capping layer covering the top surface of the metal film, and an insulating capping layer covering a top surface of the conductive alloy capping layer and a top surface of the insulating film. The conductive alloy capping layer includes a semiconductor element and a second metal different from the first metal. The insulating capping layer includes a third metal.

公开(公告)号：US20180261544A1

公开(公告)日：2018-09-13

申请号：US15846498

申请日：2017-12-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： YOUNG-BAE KIM ,  SANG-HOON AHN ,  EUI-BOK LEE ,  SU-HYUN BARK ,  HYEOK-SANG OH ,  WOO-JIN LEE ,  HOON-SEOK SEO ,  SUNG-JIN KANG

IPC: H01L23/532 ,  H01L23/522 ,  H01L23/528

CPC classification number: H01L23/5329 ,  H01L21/7682 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266

Abstract: An integrated circuit (IC) device includes a lower wiring structure including a lower metal film. The lower wiring structure penetrates at least a portion of a first insulating film disposed over a substrate. The IC device further includes a capping layer covering a top surface of the lower metal film, a second insulating film covering the capping layer, an upper wiring structure penetrating the second insulating film and the capping layer, and electrically connected to the lower metal film, and an air gap disposed between the lower metal film and the second insulating film. The air gap has a width defined by a distance between the capping layer and the upper wiring structure.