公开(公告)号：US20140264729A1

公开(公告)日：2014-09-18

申请号：US14165817

申请日：2014-01-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： WOO-JIN LEE ,  SANG-HOON AHN ,  GIL-HEYUN CHOI ,  JONG-WON HONG

IPC: H01L27/02

CPC classification number: H01L29/0649 ,  H01L21/764 ,  H01L21/76805 ,  H01L21/7682 ,  H01L21/76831

Abstract: A semiconductor device includes a substrate, a conductive pattern, a side spacer, and an air gap. The substrate includes an interlayer insulating layer and a trench penetrating the interlayer insulating layer. The conductive pattern is disposed within the trench of the substrate. The side spacer is disposed within the trench. The side spacer covers an upper side surface of the conductive pattern. The air gap is disposed within the trench. The air gap is bounded by a sidewall of the trench, the side spacer, and a lower side surface of the conductive pattern. A level of a bottom surface of the conductive pattern is lower than a level of bottom surfaces of the side spacer.

Abstract translation: 半导体器件包括衬底，导电图案，侧面间隔物和气隙。 衬底包括层间绝缘层和贯穿层间绝缘层的沟槽。 导电图案设置在基板的沟槽内。 侧间隔件设置在沟槽内。 侧隔板覆盖导电图案的上侧表面。 气隙设置在沟槽内。 气隙由沟槽的侧壁，侧面间隔物和导电图案的下侧表面限定。 导电图案的底面的水平比侧面间隔物的底面的水平低。

公开(公告)号：US20160056235A1

公开(公告)日：2016-02-25

申请号：US14931427

申请日：2015-11-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： WOO-JIN LEE ,  SANG-HOON AHN ,  GIL-HEYUN CHOI ,  JONG-WON HONG

IPC: H01L29/06

CPC classification number: H01L29/0649 ,  H01L21/764 ,  H01L21/76805 ,  H01L21/7682 ,  H01L21/76831

Abstract: A semiconductor device includes a substrate, a conductive pattern, a side spacer, and an air gap. The substrate includes an interlayer insulating layer and a trench penetrating the interlayer insulating layer. The conductive pattern is disposed within the trench of the substrate. The side spacer is disposed within the trench. The side spacer covers an upper side surface of the conductive pattern. The air gap is disposed within the trench. The air gap is bounded by a sidewall of the trench, the side spacer, and a lower side surface of the conductive pattern. A level of a bottom surface of the conductive pattern is lower than a level of bottom surfaces of the side spacer.

Abstract translation: 半导体器件包括衬底，导电图案，侧面间隔物和气隙。 衬底包括层间绝缘层和贯穿层间绝缘层的沟槽。 导电图案设置在基板的沟槽内。 侧间隔件设置在沟槽内。 侧隔板覆盖导电图案的上侧表面。 气隙设置在沟槽内。 气隙由沟槽的侧壁，侧面间隔物和导电图案的下侧表面限定。 导电图案的底面的水平比侧面间隔物的底面的水平低。

公开(公告)号：US20210233860A1

公开(公告)日：2021-07-29

申请号：US17230509

申请日：2021-04-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SU-HYUN BARK ,  SANG-HOON AHN ,  YOUNG-BAE KIM ,  HYEOK-SANG OH ,  WOO-JIN LEE ,  HOON-SEOK SEO ,  SUNG-JIN KANG

IPC: H01L23/532 ,  H01L29/16 ,  H01L21/311 ,  H01L21/768 ,  H01L23/528 ,  H01L23/522 ,  H01L29/417 ,  H01L27/088 ,  H01L29/78 ,  H01L23/485 ,  H01L21/8234

Abstract: An integrated circuit device includes a metal film and a complex capping layer covering a top surface of the metal film. The metal film includes a first metal, and penetrates at least a portion of an insulating film formed over a substrate. The complex capping layer includes a conductive alloy capping layer covering the top surface of the metal film, and an insulating capping layer covering a top surface of the conductive alloy capping layer and a top surface of the insulating film. The conductive alloy capping layer includes a semiconductor element and a second metal different from the first metal. The insulating capping layer includes a third metal.

公开(公告)号：US20180261544A1

公开(公告)日：2018-09-13

申请号：US15846498

申请日：2017-12-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： YOUNG-BAE KIM ,  SANG-HOON AHN ,  EUI-BOK LEE ,  SU-HYUN BARK ,  HYEOK-SANG OH ,  WOO-JIN LEE ,  HOON-SEOK SEO ,  SUNG-JIN KANG

IPC: H01L23/532 ,  H01L23/522 ,  H01L23/528

CPC classification number: H01L23/5329 ,  H01L21/7682 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266

Abstract: An integrated circuit (IC) device includes a lower wiring structure including a lower metal film. The lower wiring structure penetrates at least a portion of a first insulating film disposed over a substrate. The IC device further includes a capping layer covering a top surface of the lower metal film, a second insulating film covering the capping layer, an upper wiring structure penetrating the second insulating film and the capping layer, and electrically connected to the lower metal film, and an air gap disposed between the lower metal film and the second insulating film. The air gap has a width defined by a distance between the capping layer and the upper wiring structure.