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公开(公告)号：US09799407B2
公开(公告)日：2017-10-24
申请号：US15201734
申请日：2016-07-05
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Sangkwon Moon , Chul Lee , Hyun Jin Choi
CPC classification number: G11C16/349 , G06F3/0616 , G06F3/064 , G06F3/0652 , G06F3/0679 , G11C13/0035 , G11C16/3495
Abstract: A storage device includes a flash memory and a memory controller. The flash memory includes a plurality of memory blocks. The memory controller is configured to determine a fast cycle weight corresponding to a reuse period of a selected memory block among the plurality of memory blocks, and to manage wear leveling of the selected memory block using the fast cycle weight.
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公开(公告)号：US09208076B2
公开(公告)日：2015-12-08
申请号：US14183862
申请日：2014-02-19
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Nam-Ho Kim , Su-Gon Kim , Hyun Jin Choi
CPC classification number: G06F12/0246 , G06F3/0611 , G06F3/0652 , G06F3/0659 , G06F3/0679 , G06F2212/7208
Abstract: A data storing method of a nonvolatile storage device that includes a plurality of nonvolatile memory devices electrically connected to a plurality of channels is provided. The data storing method includes allocating part of write data provided from a host to the nonvolatile memory devices to each channel; determining whether at least one channel among the channels is present that is connected to a nonvolatile memory device in a last page offset state; and when the at least one channel is determined to be present, scheduling erase commands on the plurality of channels, scheduling write commands on the plurality of channels with respect to the allocated write data, and executing the erase commands and the write commands on the plurality of channels.
Abstract translation: 提供一种包括电连接到多个通道的多个非易失性存储器件的非易失性存储器件的数据存储方法。 数据存储方法包括将从主机提供的写入数据的一部分分配给非易失性存储器件到每个通道; 确定在最后页偏移状态中是否存在连接到非易失性存储器件的通道中的至少一个通道; 并且当确定存在至少一个信道时，针对所述多个信道调度擦除命令，针对所分配的写入数据调度所述多个信道上的写入命令，以及在所述多个信道上执行所述擦除命令和写入命令 的渠道。
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3.发明公开公开(公告)号：US20240311015A1
公开(公告)日：2024-09-19
申请号：US18388329
申请日：2023-11-09
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jooyoung HWANG , Hyun Jin Choi
CPC classification number: G06F3/0616 , G06F3/0656 , G06F3/0659 , G06F3/0679 , G06F12/0246 , G06F2212/7205
Abstract: In some embodiments, a storage device includes a nonvolatile memory device including a plurality of erase units, and a memory controller. Each of the plurality of erase units include a plurality of memory cells. The memory controller is configured to assign first memory cells of each of first erase units among the plurality of erase units as y-level cells, assign second memory cells of each of second erase units among the plurality of erase units as x-level cells, allocate a zone to at least one first erase unit among the first erase units and permit a sequential write with respect to the zone, buffer data to be written in the zone by using at least one second erase unit among the second erase units, and provide, to the external host device, information about the at least one second erase unit buffering the data to be written in the zone.
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公开(公告)号：US11468952B2
公开(公告)日：2022-10-11
申请号：US17191412
申请日：2021-03-03
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： In-Su Kim , Hyun Jin Choi , Alain Tran , Beom Kyu Shin , Woo Seong Cheong
Abstract: A memory controller includes an interface and a control module. The interface interfaces with a memory device which includes a plurality of dies that each include a plurality of blocks. The control module groups a plurality of blocks included in different dies and manages the plurality of blocks as a super block. The control module performs scheduling to alternately perform a program on a part of an Nth super block, wherein N is a natural number, and a phased erase on an N+1st super block, and the control module completes the program on the Nth super block and the erase on the Nth super block before the program on the N+1st super block starts.
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公开(公告)号：US20200150743A1
公开(公告)日：2020-05-14
申请号：US16439159
申请日：2019-06-12
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： WAN-SOO CHOI , Hyun Jin Choi , Jinwoo Kim , Yu-Hun Jun
IPC: G06F1/3234 , G06F1/3246 , G06F1/3287
Abstract: An operation method of an electronic device including a core includes reading first status information from a first status register of a first functional block driven independently of the core, reading second status information from a second status register of a second functional block driven independently of the core, reading first change information from a first flag register of the first functional block, reading second change information from a second flag register of the second functional block, determining whether an operation status of the electronic device is any one status of an idle status and a busy status, based on the read first and second status information and the read first and second change information, and operating in an operation mode corresponding to the determined operation status.
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Patent Agency Ranking
公开(公告)号：US10168926B2
公开(公告)日：2019-01-01
申请号：US15256939
申请日：2016-09-06
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Myung Jin Jung , Sang Yoon Oh , Hyun Sik Yun , Hyun Jin Choi
Abstract: A method of operating a data storage device performing garbage collection in response to locality information for pages of a data block. The method includes acquiring mapping table information for the plurality of pages, and determining validity of each one of the plurality of pages while scanning mapping tables indicated by mapping table information associated with the plurality of pages.
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公开(公告)号：US10229050B2
公开(公告)日：2019-03-12
申请号：US15295575
申请日：2016-10-17
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Hyun Jin Choi , Dong-Young Seo , Sang Kwon Moon
Abstract: A method of operating a storage controller, for controlling a garbage collection operation so that blocks included in a non-volatile memory satisfy reuse constraints, includes determining whether the number of free blocks among the blocks is smaller than a first reference value for triggering a garbage collection operation and performing the garbage collection operation on the blocks until the number of free blocks is equal to a second reference value larger than the first reference value according to a result of the determination.
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公开(公告)号：US10133938B2
公开(公告)日：2018-11-20
申请号：US15266231
申请日：2016-09-15
Applicant: Samsung Electronics Co., Ltd.
Inventor： Chang Hyun Kim , Tae Sup Moon , Dong Hwa Lee , Hyun Jin Choi , Ki Hwan Choi
Abstract: Disclosed are methods and apparatuses for object recognition using an artificial neural network. An object recognition apparatus includes an adjacent pixel setter configured to set the neighboring pixel pairs in the image frame, each neighboring pixel pair including first pixel and one or more second pixels adjacent to the first pixel, a labeler configured to label the first pixel using deep neural network-based model based on probability density function value of the neighboring pixel pairs, and an object recognizer configured to recognize an object based on the labeled first pixel.
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公开(公告)号：US12014772B2
公开(公告)日：2024-06-18
申请号：US17847948
申请日：2022-06-23
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Dong Eun Shin , Jeong Uk Kang , Hyun Jin Choi
CPC classification number: G11C11/5628 , G11C11/5671 , G11C16/0483 , G11C16/08 , G11C16/10
Abstract: A storage controller for writing first data to a first memory cell by performing programming of the first memory cell N-times, where N is a positive integer greater than 1, includes a write amplification manager and a central processing unit. The write amplification manager checks whether the first data is invalid data before an Nth programming of the first memory cell is performed, and the central processing unit does not perform the N-th programming of the first memory cell when the first data is the invalid data.
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10.发明授权公开(公告)号：US11341375B2
公开(公告)日：2022-05-24
申请号：US16683455
申请日：2019-11-14
Applicant: Samsung Electronics Co., Ltd.
Inventor： Hyun Jin Choi , Chang Hyun Kim , Eun Soo Shim , Dong Hwa Lee , Ki Hwan Choi
Abstract: Apparatuses and methods for image processing are provided. The image processing apparatus performs area classification and object detection in an image, and includes a feature map generator configured to generate the feature map of the input image using the neural network, and an image processor configured to classify the areas and to detect the objects in the image using the generated feature map.
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