公开(公告)号：US10298187B2

公开(公告)日：2019-05-21

申请号：US15235521

申请日：2016-08-12

Applicant: QUALCOMM Incorporated

Inventor： Jeremy Goldblatt

IPC: H03F1/14 ,  H03F3/21 ,  H03F3/195 ,  H03F3/213 ,  H03F1/02 ,  H03F3/60 ,  H03F3/72 ,  H03K17/693 ,  H04B1/04 ,  H04B1/16

Abstract: Certain aspects of the present disclosure provide a switch architecture for switching between a low power amplifier and a high power amplifier. One example amplification system includes a high power amplifier and a low power amplifier. The amplification system further includes a first switch coupled between the high power amplifier and an output. The amplification system further includes a second switch coupled between the output and a reference potential. The second switch is further coupled between the low power amplifier and the output and configured to selectively couple the low power amplifier to the output. The amplification system further includes a third switch coupled between the low power amplifier and the second switch.

公开(公告)号：US09722585B2

公开(公告)日：2017-08-01

申请号：US15144929

申请日：2016-05-03

Applicant: QUALCOMM Incorporated

Inventor： Jeremy Goldblatt

IPC: H03K5/00 ,  H03K3/356 ,  H03K3/012 ,  H03K19/00 ,  H03K5/24

CPC classification number: H03K3/35613 ,  H03K3/012 ,  H03K3/356139 ,  H03K5/00 ,  H03K5/2481 ,  H03K5/249 ,  H03K19/0016

Abstract: A circuit to a extend signal comparison voltage range includes a latching circuit and a comparator responsive to common-mode input signals. The comparator is coupled to the latching circuit and to a dynamic node. The circuit also includes a clocked boost circuit coupled to the dynamic node. The clocked boost circuit is configured to extend a supply voltage range of the comparator via biasing the dynamic node. A method to extend a signal comparison voltage range includes selectively shifting a voltage level of one of a ground reference of a dynamic circuit or a supply reference of the dynamic circuit in response to a clock signal.

公开(公告)号：US12261577B2

公开(公告)日：2025-03-25

申请号：US17356424

申请日：2021-06-23

Applicant: QUALCOMM Incorporated

Inventor： Jeremy Goldblatt ,  Arul Balasubramaniyan ,  Chinmaya Mishra ,  Damin Cao ,  Bhushan Shanti Asuri

IPC: H03F3/24 ,  G01R19/04 ,  H03F1/02 ,  H03F3/195 ,  H03G3/30 ,  H04B1/04

Abstract: A peak detector for a power amplifier is provided that includes a threshold voltage detector configured to pulse a detection current in response to an amplified output signal from the amplifier exceeding a peak threshold. A plurality of such peak detectors may be integrated with a corresponding plurality of power amplifiers in a transmitter. Should any peak detector assert an alarm signal or more than a threshold number of alarm signals during a given period, a controller reduces a gain for the plurality of power amplifiers.

公开(公告)号：US09985591B2

公开(公告)日：2018-05-29

申请号：US15421282

申请日：2017-01-31

Applicant: QUALCOMM Incorporated

Inventor： Jeremy Goldblatt ,  Darryl Jessie

IPC: H03F1/56 ,  H03F3/193 ,  H03F3/21

CPC classification number: H03F1/56 ,  H03F1/223 ,  H03F3/193 ,  H03F3/245 ,  H03F3/505 ,  H03F2200/222 ,  H03F2200/318 ,  H03F2200/387 ,  H03F2200/451 ,  H03F2200/534 ,  H03F2200/69

Abstract: A power amplification device includes a power amplifier core stage and a power amplifier driver stage. The power amplifier driver stage receives a radio frequency signal to be amplified by the power amplification device. The power amplifier driver stage includes a first source follower input transistor and a first current source transistor. A source of the first source follower input transistor is coupled to a drain of the first current source transistor. The source of the first source follower input transistor is directly coupled to the power amplifier core stage to drive the power amplifier core stage. An input match and passive voltage gain device is coupled to the power amplifier driver stage to generate a voltage gain at an input of the power amplifier driver stage. A first bias source is configured to generate a first bias signal to bias the power amplifier driver stage.

公开(公告)号：US10756772B1

公开(公告)日：2020-08-25

申请号：US16418734

申请日：2019-05-21

Applicant: Qualcomm Incorporated

Inventor： Chirag Dipak Patel ,  Jeremy Goldblatt ,  Yunfei Feng ,  Li Liu ,  Xinmin Yu ,  Aliakbar Homayoun

IPC: H04B1/26 ,  H04B1/30 ,  H04B1/16

Abstract: An apparatus is disclosed for mixing signals with a multi-mode mixer for frequency translation. In example implementations, a multi-mode mixer includes a supply voltage node, a ground node, a first data signal coupler, and a second data signal coupler. The multi-mode mixer also includes a mixer core and a current control switch. The mixer core is coupled between the first data signal coupler and the second data signal coupler. The current control switch is configured to selectively enable or disable flow of a current through the mixer core. The first data signal coupler, the second data signal coupler, the mixer core, and the current control switch are coupled together in series between the supply voltage node and the ground node.

公开(公告)号：US10236838B2

公开(公告)日：2019-03-19

申请号：US15424603

申请日：2017-02-03

Applicant: QUALCOMM Incorporated

Inventor： Wai Lim Ngai ,  Jeremy Goldblatt

IPC: H03F3/21 ,  H03F1/02 ,  H03F3/19 ,  H03F3/72

Abstract: An amplification circuit includes: an input stage including a driver; a transformer that includes a primary winding and a secondary winding, the primary winding being coupled to an output of the driver; and an output stage including: an output configured to be coupled to a load; and a plurality of paths coupled to the output and coupled to respective taps of the secondary winding; where at least one of the plurality of paths comprises a power amplifier.

公开(公告)号：US11916580B2

公开(公告)日：2024-02-27

申请号：US17448543

申请日：2021-09-23

Applicant: QUALCOMM Incorporated

Inventor： Jeremy Goldblatt ,  Chinmaya Mishra

IPC: H04B1/04 ,  G01R27/16 ,  H01P5/18 ,  H03F1/32 ,  H03F3/24

CPC classification number: H04B1/0475 ,  G01R27/16 ,  H01P5/18 ,  H03F1/3241 ,  H03F3/245 ,  H03F2200/451 ,  H04B2001/0425

Abstract: An integrated circuit operable to measure an impedance presented to a transmitter path of the integrated circuit and a method thereof are provided. The integrated circuit includes a directional coupler that has an input port, a through port, a coupled port, and an isolation port. The integrated circuit also includes a power amplifier coupled to the input port of the directional coupler, a power detector configured to measure output levels from the coupled port and the isolation port of the directional coupler, a reference signal generator coupled to the isolation port of the directional coupler, and a vector modulator configured to adjust a phase of a signal generated from the power amplifier.

公开(公告)号：US10218326B2

公开(公告)日：2019-02-26

申请号：US15583890

申请日：2017-05-01

Applicant: QUALCOMM Incorporated

Inventor： Jiang Chen ,  Jeremy Goldblatt ,  Jose Cabanillas

IPC: H03G3/00 ,  H03G3/30 ,  H03F1/56 ,  H03F3/193 ,  H03F3/21 ,  H03F1/02 ,  H03F1/32 ,  H03F3/189 ,  H03F1/22 ,  H03F3/24 ,  H03F3/45 ,  H03F3/50

Abstract: A power amplifier bias circuit with embedded envelope detection includes a bias circuit stage coupled to an envelope detector circuit to increases a bias provided to a power amplifier as a function of an incoming envelope signal. The envelope detector circuit includes a first source/emitter follower transistor, a current source, and a filter to generate a baseband envelope signal. The current source is coupled to an output node of the first source/emitter follower transistor and the filter is also coupled to the output node of the first source/emitter follower transistor. The bias circuit stage includes one or more replica transistors that replicate transistors of the power amplifier or power amplifier core stage, an envelope detector replica transistor and a replica of the current source of the envelope detector circuit.

公开(公告)号：US11380988B2

公开(公告)日：2022-07-05

申请号：US17098319

申请日：2020-11-13

Applicant: QUALCOMM Incorporated

Inventor： Muhammad Hassan ,  Jeremy Goldblatt ,  Bhushan Shanti Asuri ,  Jeremy Darren Dunworth ,  Abdellatif Bellaouar ,  Ravi Sridhara ,  Jorge Garcia

IPC: H01Q3/24 ,  H04B1/44 ,  H01Q21/12 ,  H01Q21/20

Abstract: In some aspects, an apparatus includes a transformer including a first inductor, a second inductor, and a third inductor. The apparatus also includes a power amplifier coupled to the first inductor, a first antenna coupled to a first terminal of the second inductor, a second antenna coupled to a second terminal of the second inductor, a first switch coupled between the first terminal of the second inductor and a ground, a second switch coupled between the second terminal of the second inductor and the ground, and a low-noise amplifier coupled to the third inductor.