Abstract:
A reconfigurable amplifier includes a first transistor having a gate coupled to an input of the reconfigurable amplifier, and a source coupled to a ground. The reconfigurable amplifier also includes a gate control circuit, and a second transistor having a gate coupled to the gate control circuit, a source coupled to a drain of the first transistor, and a drain coupled to an output of the reconfigurable amplifier, wherein the gate control circuit is configured to output a bias voltage to the gate of the second transistor in a cascode mode, and output a switch voltage to the gate of the second transistor in a non-cascode mode. The reconfigurable amplifier further includes a load coupled to the output of the reconfigurable amplifier.
Abstract:
Wireless signal processing may be improved by using a configurable baseband filter (BBF) in the receive path of a transceiver. A configurable BBF may accommodate processing of different wireless signals in a single integrated circuit (IC) chip. For example, a single IC may support processing of 5G mmWave RF signals and 5G sub-7 GHz RF signals by reconfiguring the BBF with settings appropriate for the different wireless signals. The reconfiguring of the BBF may include adjusting a bandwidth of the BBF and/or adjusting a filter order of the BBF. The reconfiguring of the BBF may be performed in response to detection of jammer signals to improve rejection of the jammer signals.
Abstract:
Certain aspects of the present disclosure provide methods and apparatus for processing signals using a current-mode biquad filter, which may have a tunable bias current and/or tunable capacitance. One example apparatus is a current-mode biquad filter circuit that includes a first input current node, a first capacitive element coupled to the first input current node, a first output current node, a first active filter circuit coupled between the first input current node and the first output current node, and a second active filter circuit coupled between the first input current node and the first output current node. The second active filter circuit is complementary to the first active filter circuit.
Abstract:
An RF driver circuit may include a wideband output impedance matching and gain circuit, a wideband input impedance matching and gain circuit, and a summer configured to sum the outputs of the wideband output impedance matching and gain circuit and wideband input impedance matching and gain circuit. The wideband output impedance matching and gain circuit and wideband input impedance matching and gain circuit may collectively provide the gain of the RF driver circuit. The wideband output impedance matching circuit may have a source follower configuration. The wideband input impedance matching circuit may have a common gate configuration. Controllable bias voltages may be used to maintain a constant gain and interface impedances in multiple modes of operation.
Abstract:
Methods, systems, and devices for wireless communication are described for enhanced broadband operation of an active mixer. In an example, an apparatus may include an active mixer that converts between radio frequency (RF) signals and intermediate frequency (IF) signals based at least in part on an alternating current (AC) local oscillator (LO) signal, wherein a direct current (DC) current generated within the active mixer is dependent in part on a bias voltage and the AC LO signal. The apparatus may include a mixer biasing circuit that generates the bias voltage for the active mixer, a magnitude of the bias voltage having an inverse relationship to an amplitude of the AC LO signal.
Abstract:
An apparatus includes a phase detector coupled to an output of a frequency multiplier. A digital loop filter is coupled to the phase detector, and a duty cycle correction circuit is coupled to the digital loop filter.
Abstract:
Reconfiguring a transceiver design using a plurality of frequency synthesizers and a plurality of carrier aggregation (CA) receiver (Rx) and transmitter (Tx) chains, the method including: connecting a first frequency synthesizer to a first CA Tx chain; connecting the plurality of frequency synthesizers to the plurality of CA Rx chains, wherein a second frequency synthesizer of the plurality of frequency synthesizers is connected as a shared synthesizer to a first CA Rx chain and a second CA Tx chain.
Abstract:
Multiplex modules for use in carrier aggregation receivers are disclosed. In an exemplary embodiment, an apparatus includes an LNA multiplexer configured to receive a plurality of RF signals at a plurality of input terminals and to combine the RF signals into a combined RF signal that is output from an output terminal The apparatus also includes an LNA demultiplexer configured to receive the combined RF signal at an input port that is connected to the output terminal and to distribute the combined RF signal to a plurality of output ports.
Abstract:
A dual frequency synthesizer architecture for a wireless device operating in a time division duplex (TDD) mode is disclosed. In an exemplary design, the wireless device includes first and second frequency synthesizers. The first frequency synthesizer generates a first oscillator signal used to generate a first/receive local oscillator (LO) signal at an LO frequency for the receiver. The second frequency synthesizer generates a second oscillator signal used to generate a second/transmit LO signal at the same LO frequency for the transmitter. The two frequency synthesizers generate their oscillator signals to obtain receive and transmit LO signals at the same LO frequency when the wireless device operates in the TDD mode.
Abstract:
Techniques for detecting and correcting phase discontinuity of a local oscillator (LO) signal are disclosed. In one design, a wireless device includes an LO generator and a phase detector. The LO generator generates an LO signal used for frequency conversion and is periodically powered on and off. The phase detector detects the phase of the LO signal when the LO generator is powered on. The detected phase of the LO signal is used to identify phase discontinuity of the LO signal. The wireless device may further include (i) a single-tone generator that generates a single-tone signal used to detect the phase of the LO signal, (ii) a downconverter that downconverts the single-tone signal with the LO signal and provides a downconverted signal used by the phase detector to detect the phase of LO signal, and (iii) phase corrector that corrects phase discontinuity of the LO signal in the analog domain or digital domain.