公开(公告)号：US20210375738A1

公开(公告)日：2021-12-02

申请号：US17334447

申请日：2021-05-28

Applicant: Micron Technology, Inc.

Inventor： David K. Ovard ,  Thomas Hein ,  Timothy M. Hollis ,  Walter L. Moden

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/31

Abstract: Apparatuses may include a device substrate including a microelectronic device and bond pads proximate to an active surface of the device substrate. A package substrate may be secured to the device substrate, the package substrate configured to route signals to and from the bond pads. A ball grid array may be supported on, and electrically connected to, the package substrate. Each ball positioned and configured to carry a high-bandwidth data signal or a high-frequency clock signal may be located laterally or longitudinally adjacent to no more than one other ball of the ball grid array configured to carry a high-bandwidth data signal or a high-frequency clock signal. Each ball positioned and configured to carry a high-bandwidth data signal may be located only diagonally adjacent to any other balls configured to carry a high-bandwidth data signal or a high-frequency clock signal.

公开(公告)号：US10083937B2

公开(公告)日：2018-09-25

申请号：US15354467

申请日：2016-11-17

Applicant: Micron Technology, Inc.

Inventor： Anthony D. Veches ,  William R. Stephenson ,  Walter L. Moden

IPC: H01L25/065 ,  H01L23/00 ,  H01L25/00 ,  H01L23/495 ,  H01L21/02 ,  H01L23/31 ,  H01L21/20 ,  H01L27/1157 ,  H01L23/488

CPC classification number: H01L25/0657 ,  H01L21/0228 ,  H01L21/2007 ,  H01L23/3114 ,  H01L23/3142 ,  H01L23/488 ,  H01L23/4951 ,  H01L23/4952 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/81 ,  H01L24/85 ,  H01L24/92 ,  H01L25/50 ,  H01L27/1157 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/0615 ,  H01L2224/06156 ,  H01L2224/09517 ,  H01L2224/1134 ,  H01L2224/131 ,  H01L2224/1411 ,  H01L2224/1415 ,  H01L2224/14156 ,  H01L2224/16148 ,  H01L2224/17177 ,  H01L2224/17517 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48108 ,  H01L2224/48149 ,  H01L2224/48227 ,  H01L2224/48477 ,  H01L2224/49175 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2224/8112 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/85186 ,  H01L2224/85205 ,  H01L2224/85207 ,  H01L2224/92127 ,  H01L2224/92163 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2924/00014 ,  H01L2924/014

Abstract: Semiconductor device packages include first and second semiconductor dice in a facing relationship. At least one group of solder bumps is substantially along a centerline between the semiconductor dice and operably coupled with integrated circuitry of the first and second semiconductor dice. Another group of solder bumps is laterally offset from the centerline and operably coupled only with integrated circuitry of the first semiconductor die. A further group of solder bumps is laterally offset from the centerline and operably coupled only with integrated circuitry of the second semiconductor die. Methods of forming semiconductor device packages include aligning first and second semiconductor dice with active surfaces facing each other, the first and second semiconductor dice each including bond pads along a centerline thereof and additional bond pads laterally offset from the centerline thereof.

公开(公告)号：US20240282691A1

公开(公告)日：2024-08-22

申请号：US18652515

申请日：2024-05-01

Applicant: Micron Technology, Inc.

Inventor： David K. Ovard ,  Thomas Hein ,  Timothy M. Hollis ,  Walter L. Moden

IPC: H01L23/498 ,  H01L23/00

CPC classification number: H01L23/49838 ,  H01L23/49816 ,  H01L23/49822 ,  H01L24/16 ,  H01L2224/16227 ,  H01L2924/15311 ,  H01L2924/18161

Abstract: Systems may include a central processing unit (CPU), a graphics processing unit (GPU), or a field programmable gate array (FPGA), or any combination thereof. At least one memory device may be connected to the CPU, the GPU, or the FPGA. The memory device(s) may include a device substrate including a microelectronic device and bond pads coupled with an active surface of the device substrate. A package substrate may be secured to the device substrate, the package substrate configured to route signals to and from the bond pads. A ball grid array may be supported on the package substrate. Each ball of the ball grid array positioned and configured to carry one of a high-bandwidth data signal or a high-frequency clock signal may be located only diagonally adjacent to any other balls of the ball grid array configured to carry another of a high-bandwidth data signal or a high-frequency clock signal.

公开(公告)号：US11670578B2

公开(公告)日：2023-06-06

申请号：US17334447

申请日：2021-05-28

Applicant: Micron Technology, Inc.

Inventor： David K. Ovard ,  Thomas Hein ,  Timothy M. Hollis ,  Walter L. Moden

IPC: H01L23/48 ,  H01L23/498 ,  H01L23/00

CPC classification number: H01L23/49838 ,  H01L23/49816 ,  H01L23/49822 ,  H01L24/16 ,  H01L2224/16227 ,  H01L2924/15311 ,  H01L2924/18161

Abstract: Apparatuses may include a device substrate including a microelectronic device and bond pads proximate to an active surface of the device substrate. A package substrate may be secured to the device substrate, the package substrate configured to route signals to and from the bond pads. A ball grid array may be supported on, and electrically connected to, the package substrate. Each ball positioned and configured to carry a high-bandwidth data signal or a high-frequency clock signal may be located laterally or longitudinally adjacent to no more than one other ball of the ball grid array configured to carry a high-bandwidth data signal or a high-frequency clock signal. Each ball positioned and configured to carry a high-bandwidth data signal may be located only diagonally adjacent to any other balls configured to carry a high-bandwidth data signal or a high-frequency clock signal.

公开(公告)号：US20240284590A1

公开(公告)日：2024-08-22

申请号：US18436892

申请日：2024-02-08

Applicant: Micron Technology, Inc.

Inventor： Chan H. Yoo ,  James M. Derderian ,  Walter L. Moden ,  Christopher Glancey

IPC: H05K1/02 ,  G01R31/309 ,  H05K3/28

CPC classification number: H05K1/0269 ,  G01R31/309 ,  H05K3/28

Abstract: Aspects of the present disclosure configure a processor to detect faults in a printed circuit board (PCB) solder mask using an optical waveguide. The processor directs an optical beam to an input of one or more optical waveguides embedded in a protective coating layer of a PCB, the protective coating layer being adjacent to one or more traces of the PCB. The processor measures a beam characteristic of the optical beam that is output by the one or more optical waveguides. The processor detects a disruption of the optical beam that is output by the one or more optical waveguides based on the beam characteristic. The processor detects a fault in the protective coating layer of the PCB based on detecting the disruption of the optical beam that is output by the one or more optical waveguides.

公开(公告)号：US20230275016A1

公开(公告)日：2023-08-31

申请号：US18312801

申请日：2023-05-05

Applicant: Micron Technology, Inc.

Inventor： David K. Ovard ,  Thomas Hein ,  Timothy M. Hollis ,  Walter L. Moden

IPC: H01L23/498 ,  H01L23/00

CPC classification number: H01L23/49838 ,  H01L24/16 ,  H01L23/49822 ,  H01L23/49816 ,  H01L2924/18161 ,  H01L2224/16227 ,  H01L2924/15311

Abstract: Apparatuses may include a device substrate including a microelectronic device and bond pads proximate to an active surface of the device substrate. A package substrate may be secured to the device substrate, the package substrate configured to route signals to and from the bond pads. A ball grid array may be supported on, and electrically connected to, the package substrate. Each ball positioned and configured to carry a high-bandwidth data signal or a high-frequency clock signal may be located laterally or longitudinally adjacent to no more than one other ball of the ball grid array configured to carry a high-bandwidth data signal or a high-frequency clock signal. Each ball positioned and configured to carry a high-bandwidth data signal may be located only diagonally adjacent to any other balls configured to carry a high-bandwidth data signal or a high-frequency clock signal.

公开(公告)号：US20240074055A1

公开(公告)日：2024-02-29

申请号：US17899477

申请日：2022-08-30

Applicant: Micron Technology, Inc.

Inventor： Walter L. Moden ,  Stephen F. Moxham ,  Travis M. Jensen

IPC: H05K1/11 ,  H01L21/48 ,  H01L23/48 ,  H01L23/498 ,  H05K3/00 ,  H05K3/40

CPC classification number: H05K1/116 ,  H01L21/4846 ,  H01L23/481 ,  H01L23/49827 ,  H01L23/49838 ,  H05K3/0014 ,  H05K3/0047 ,  H05K3/4038 ,  H01L24/16 ,  H05K2201/09563 ,  H05K2201/09636

Abstract: Substrates with continuous slot vias are disclosed herein. In one embodiment, a substrate comprises a first design layer, a second design layer, and an intermediary layer between the first and second design layers. The substrate further includes first and second signaling vias extending vertically through the intermediary layer between the first and second design layers. The first and second signaling vias route first and second data signals, respectively, between the first and second design layers. The substrate further includes a slot via that is positioned between the first and second signaling vias within the intermediary layer and extends laterally within the intermediary layer along a path that passes between the first signaling via and the second signaling via. The slot via can have a continuous shape such that the slot via shields the first and second data signals on the first and second signaling vias from crosstalk with one another.

公开(公告)号：US20240047351A1

公开(公告)日：2024-02-08

申请号：US17882441

申请日：2022-08-05

Applicant: Micron Technology, Inc.

Inventor： Walter L. Moden

IPC: H01L23/528 ,  H01L21/56 ,  H01L21/308 ,  H01L23/532 ,  H01L23/495 ,  H01L27/105

CPC classification number: H01L23/528 ,  H01L21/563 ,  H01L21/308 ,  H01L23/53204 ,  H01L23/49503 ,  H01L27/105

Abstract: Semiconductor devices, such as memory devices, and associated systems and methods, are disclosed herein. A representative semiconductor device comprises a substrate including a plurality of conductive contacts and a mask material having a surface. The mask material includes (a) a first recess formed in the surface having a first depth and (b) a second recess formed in the surface having a second depth greater than the first depth. An exposed portion of each of the conductive contacts is exposed from the mask material in the second recess. The semiconductor device further comprises a semiconductor die including a lower surface having bond pads, and the lower surface is positioned in the first recess. The semiconductor device further comprises a plurality of conductive features electrically coupling individual ones of the bond pads to corresponding ones of the exposed portions of the conductive contacts.

公开(公告)号：US20170069603A1

公开(公告)日：2017-03-09

申请号：US15354467

申请日：2016-11-17

Applicant: Micron Technology, Inc.

Inventor： Anthony D. Veches ,  William R. Stephenson ,  Walter L. Moden

IPC: H01L25/065 ,  H01L25/00 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01L25/0657 ,  H01L21/0228 ,  H01L21/2007 ,  H01L23/3114 ,  H01L23/3142 ,  H01L23/488 ,  H01L23/4951 ,  H01L23/4952 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/81 ,  H01L24/85 ,  H01L24/92 ,  H01L25/50 ,  H01L27/1157 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/0615 ,  H01L2224/06156 ,  H01L2224/09517 ,  H01L2224/1134 ,  H01L2224/131 ,  H01L2224/1411 ,  H01L2224/1415 ,  H01L2224/14156 ,  H01L2224/16148 ,  H01L2224/17177 ,  H01L2224/17517 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48108 ,  H01L2224/48149 ,  H01L2224/48227 ,  H01L2224/48477 ,  H01L2224/49175 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2224/8112 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/85186 ,  H01L2224/85205 ,  H01L2224/85207 ,  H01L2224/92127 ,  H01L2224/92163 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2924/00014 ,  H01L2924/014

Abstract: Semiconductor device packages include first and second semiconductor dice in a facing relationship. At least one group of solder bumps is substantially along a centerline between the semiconductor dice and operably coupled with integrated circuitry of the first and second semiconductor dice. Another group of solder bumps is laterally offset from the centerline and operably coupled only with integrated circuitry of the first semiconductor die. A further group of solder bumps is laterally offset from the centerline and operably coupled only with integrated circuitry of the second semiconductor die. Methods of forming semiconductor device packages include aligning first and second semiconductor dice with active surfaces facing each other, the first and second semiconductor dice each including bond pads along a centerline thereof and additional bond pads laterally offset from the centerline thereof.

Abstract translation: 半导体器件封装包括面对关系的第一和第二半导体管芯。 至少一组焊料凸块基本上沿着半导体晶片之间的中心线并且与第一和第二半导体晶片的集成电路可操作地耦合。 另一组焊料凸起从中心线横向偏移并且仅与第一半导体管芯的集成电路可操作地耦合。 另一组焊料凸块从中心线横向偏移并且仅与第二半导体管芯的集成电路可操作地耦合。 形成半导体器件封装的方法包括将第一和第二半导体晶片与彼此面对的有源表面对准，第一和第二半导体晶片各自包括沿着其中心线的键合焊盘和从其中心线横向偏移的附加焊盘。

公开(公告)号：US11996359B2

公开(公告)日：2024-05-28

申请号：US18312801

申请日：2023-05-05

Applicant: Micron Technology, Inc.

Inventor： David K. Ovard ,  Thomas Hein ,  Timothy M. Hollis ,  Walter L. Moden

IPC: H01L23/48 ,  H01L23/00 ,  H01L23/498

CPC classification number: H01L23/49838 ,  H01L23/49816 ,  H01L23/49822 ,  H01L24/16 ,  H01L2224/16227 ,  H01L2924/15311 ,  H01L2924/18161

Abstract: Apparatuses may include a device substrate including a microelectronic device and bond pads proximate to an active surface of the device substrate. A package substrate may be secured to the device substrate, the package substrate configured to route signals to and from the bond pads. A ball grid array may be supported on, and electrically connected to, the package substrate. Each ball positioned and configured to carry a high-bandwidth data signal or a high-frequency clock signal may be located laterally or longitudinally adjacent to no more than one other ball of the ball grid array configured to carry a high-bandwidth data signal or a high-frequency clock signal. Each ball positioned and configured to carry a high-bandwidth data signal may be located only diagonally adjacent to any other balls configured to carry a high-bandwidth data signal or a high-frequency clock signal.