摘要:
A process flow exposing and cleaning contact surfaces employing a liquid cleaning agent such as flux to penetrate the interface between the glassy coats and the surface of metal and to delaminate the coats from the metal, and then, at elevated temperatures, to use the agent's vapor pressure to break up the glassy coats into smaller pieces. The glassy coats are prevented by their low density to penetrate into the molten solder. Finally, at ambient temperature, the floating filler debris is water-washed and rinsed away. Cleaning agents include low-viscosity liquids (oils) and flux, which do not decompose at elevated temperatures and are mixed with components operable to provide, at the elevated temperatures, the fumes for sufficient vapor pressure to break up and dislodge the coats from the metal contacts.
摘要:
A semiconductor system (200) of one or more semiconductor interposers (201) with a certain dimension (210), conductive vias (212) extending from the first to the second surface, with terminals and attached non-reflow metal studs (215) at the ends of the vias. A semiconducting interposer surface may include discrete electronic components or an integrated circuit. One or more semiconductor chips (202, 203) have a dimension (220, 230) narrower than the interposer dimension, and an active surface with terminals and non-reflow metal studs (224, 234). One chip is flip-attached to the first interposer surface, and another chip to the second interposer surface, so that the interposer dimension projects over the chip dimension. An insulating substrate (204) has terminals and reflow bodies (242) to connect to the studs of the projecting interposer.
摘要:
A device has a first semiconductor chip (101) with contact pads in an interior first set (102) and a peripheral second set (103). A deformed sphere (104) of non-reflow metal such as gold is placed on each contact pad of the first and second sets. At least one additional deformed sphere (105) is placed on the first set pads, forming column-shaped spacers. The first chip is attached to a substrate (110) with a chip attachment location and a third set of contact pads (112) near the location. Low profile bond wires (130) span between the pads of the third set and the second set. A second semiconductor chip (140) of a size has a fourth set of contact pads (141) at locations matching the first set pads. The second chip is placed over the first chip so that the fourth set pads are aligned with the spacers on the matching first set pads, and at least one edge of the second chip overhangs the sphere on at least one pad of the second set. A reflow metal (142) bonds the spacers to the second chip, while the spacers space the first and second chips by a gap (105a) wide enough for placing the wire spans to the second set pads.
摘要:
Attaching a semiconductor chip to a substrate by applying mechanical vibrations (150) to a polymeric compound (130) and the contacting areas (114, 124) of a first (113) and a second (121) metallic member immersed in the compound, while the two metallic members approach (140) each other until they touch. The mechanical vibration causes displacements of the first member relative to the second member, and the vibration includes displacements (150) oriented at right angles to the direction (140) of the approach. The polymeric compound (130) includes a non-conductive adhesive resin paste (NCP) and filler particles; the paste is deposited before the attaching step. The first member (113) is affixed to the chip and the second member (121) to the substrate.
摘要:
A semiconductor device with a sheet-like insulating substrate (101) integral with two or more patterned layers of conductive lines and vias, a chip attached to an assembly site, and contact pads (103) in pad locations has an encapsulated region on the top surface of the substrate, extending to the edge of the substrate, enclosing the chip, and having contact apertures (703) at the pad locations for external communication with the pad metal surfaces. The apertures may have not-smooth sidewall surfaces and may be filled with solder material (704) to contact the pads. Metal-filled surface grooves (710) in the encapsulated region, with smooth groove bottom and sidewalls, are selected to serve as customized routing interconnections, or redistribution lines, between selected apertures and thus to facilitate the coupling with another semiconductor device to form a package-on-package assembly.