公开(公告)号：US07776653B2

公开(公告)日：2010-08-17

申请号：US12497170

申请日：2009-07-02

申请人： David N Walter ,  Duy-Loan T Le ,  Mark A Gerber

发明人： David N Walter ,  Duy-Loan T Le ,  Mark A Gerber

IPC分类号： H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC分类号： H01L24/05 ,  H01L21/563 ,  H01L23/3128 ,  H01L24/11 ,  H01L24/13 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/85 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/1134 ,  H01L2224/1308 ,  H01L2224/13099 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/4845 ,  H01L2224/48471 ,  H01L2224/48624 ,  H01L2224/48647 ,  H01L2224/73203 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/85045 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06579 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/20105 ,  H01L2924/20106 ,  H01L2924/20107 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A device has a first semiconductor chip (101) with contact pads in an interior first set (102) and a peripheral second set (103). A deformed sphere (104) of non-reflow metal such as gold is placed on each contact pad of the first and second sets. At least one additional deformed sphere (105) is placed on the first set pads, forming column-shaped spacers. The first chip is attached to a substrate (110) with a chip attachment location and a third set of contact pads (112) near the location. Low profile bond wires (130) span between the pads of the third set and the second set. A second semiconductor chip (140) of a size has a fourth set of contact pads (141) at locations matching the first set pads. The second chip is placed over the first chip so that the fourth set pads are aligned with the spacers on the matching first set pads, and at least one edge of the second chip overhangs the sphere on at least one pad of the second set. A reflow metal (142) bonds the spacers to the second chip, while the spacers space the first and second chips by a gap (105a) wide enough for placing the wire spans to the second set pads.

摘要翻译： 器件具有在内部第一组（102）和外围第二组（103）中具有接触垫的第一半导体芯片（101）。 非回流金属（例如金）的变形球体（104）被放置在第一和第二组的每个接触垫上。 至少一个附加的变形球体（105）被放置在第一组垫上，形成柱状间隔件。 第一芯片附接到具有芯片附接位置的基板（110）和位于该位置附近的第三组接触焊盘（112）。 薄型结合线（130）跨越第三组和第二组的焊盘之间。 尺寸的第二半导体芯片（140）在与第一组焊盘匹配的位置处具有第四组接触焊盘（141）。 第二芯片放置在第一芯片上，使得第四组焊盘与匹配的第一组焊盘上的间隔件对准，并且第二芯片的至少一个边缘在第二组的至少一个焊盘上悬垂在球体上。 回流金属（142）将间隔物连接到第二芯片，而间隔物将第一和第二芯片间隔开足够宽的间隙（105a），以将导线跨距放置到第二固定焊盘。