知搜-全球专利检索

  1. 登录
  2. 注册

搜索结果

10 条记录 (耗时 0.019 秒)

    Manufacturing method of non-volatile storage device, and non-volatile storage device
    1.
    发明授权
    Manufacturing method of non-volatile storage device, and non-volatile storage device 有权
    非易失性存储设备的制造方法和非易失性存储设备

    公开(公告)号：US09099646B2

    公开(公告)日：2015-08-04

    申请号：US13778971

    申请日：2013-02-27

    申请人： Kabushiki Kaisha Toshiba

    发明人： Hideki Inokuma ,  Kazuhiko Yamamoto

    IPC分类号： H01L21/20 ,  H01L45/00 ,  H01L27/24

    CPC分类号： H01L45/1608 ,  H01L27/2436 ,  H01L27/2481 ,  H01L45/04 ,  H01L45/085 ,  H01L45/1226 ,  H01L45/146 ,  H01L45/147 ,  H01L45/1616 ,  H01L45/1675

    摘要： A manufacturing method includes forming a laminated body on a substrate. A mask layer is formed on the laminated body, and then a portion of the mask layer is removed to form an opening. Then, using the mask layer as a template, a first portion of the laminated body is removed to expose a portion of the substrate beneath the laminated body. The substrate is processed to alter the ratio between the size of mask opening and the removed first portion. A variable resistance layer is then deposited on exposed portions of the mask layer, the laminated body, and the substrate. Then the variable resistance layer is processed to remove at least a portion covering the substrate to permit contact with the underlying substrate. A second electrode layer is deposited to fill the removed portions of the laminated body.

    摘要翻译： 制造方法包括在基板上形成层叠体。 在层叠体上形成掩模层，然后去除掩模层的一部分以形成开口。 然后，使用掩模层作为模板，去除层叠体的第一部分，以暴露层叠体下方的基板的一部分。 处理衬底以改变掩模开口的尺寸和去除的第一部分之间的比率。 然后将可变电阻层沉积在掩模层，层压体和衬底的暴露部分上。 然后处理可变电阻层以去除覆盖衬底的至少一部分，以允许与下面的衬底接触。 沉积第二电极层以填充层压体的去除部分。

    Memory device
    6.
    发明授权
    Memory device 有权
    内存设备

    公开(公告)号：US09406721B1

    公开(公告)日：2016-08-02

    申请号：US14841373

    申请日：2015-08-31

    申请人： KABUSHIKI KAISHA TOSHIBA

    发明人： Kazuhiko Yamamoto ,  Kunifumi Suzuki

    IPC分类号： H01L47/00 ,  H01L27/24 ,  H01L45/00

    CPC分类号： H01L45/144 ,  H01L27/249 ,  H01L45/06 ,  H01L45/1226

    摘要： A memory device includes a bit line extending in a first direction, a word line extending in a second direction crossing the first direction, an insulating material between the word line and another word line, a first layer made of a Group IV element, between the word line and the insulating material and between the word line and the bit line, and a second layer made of a compound of a Group V element and a Group VI element, between the insulating material and the bit line. The word line includes a first portion that is metallic and a second portion between the first portion and the first layer. In addition, a variable resistance portion in contact with the first and second layers and the second portion of the word line, contains the Group IV element and the compound of the Group V element and the Group VI element.

    摘要翻译： 存储器件包括沿第一方向延伸的位线，在与第一方向交叉的第二方向上延伸的字线，在字线和另一字线之间的绝缘材料，由IV族元件制成的第一层， 字线和绝缘材料之间以及字线和位线之间以及在绝缘材料和位线之间由第V族元素和第VI族元素的化合物制成的第二层。 字线包括金属的第一部分和在第一部分和第一层之间的第二部分。 此外，与第一和第二层和字线的第二部分接触的可变电阻部分包含IV族元素和V族元素和VI族元素的化合物。

    MANUFACTURING METHOD OF NON-VOLATILE STORAGE DEVICE, AND NON-VOLATILE STORAGE DEVICE
    8.
    发明申请
    MANUFACTURING METHOD OF NON-VOLATILE STORAGE DEVICE, AND NON-VOLATILE STORAGE DEVICE 有权
    非易失存储器件的制造方法和非易失性存储器件

    公开(公告)号：US20140042383A1

    公开(公告)日：2014-02-13

    申请号：US13778971

    申请日：2013-02-27

    申请人： KABUSHIKI KAISHA TOSHIBA

    发明人： Hideki INOKUMA ,  Kazuhiko Yamamoto

    IPC分类号： H01L45/00

    CPC分类号： H01L45/1608 ,  H01L27/2436 ,  H01L27/2481 ,  H01L45/04 ,  H01L45/085 ,  H01L45/1226 ,  H01L45/146 ,  H01L45/147 ,  H01L45/1616 ,  H01L45/1675

    摘要： A manufacturing method includes forming a laminated body on a substrate. A mask layer is formed on the laminated body, and then a portion of the mask layer is removed to form an opening. Then, using the mask layer as a template, a first portion of the laminated body is removed to expose a portion of the substrate beneath the laminated body. The substrate is processed to alter the ratio between the size of mask opening and the removed first portion. A variable resistance layer is then deposited on exposed portions of the mask layer, the laminated body, and the substrate. Then the variable resistance layer is processed to remove at least a portion covering the substrate to permit contact with the underlying substrate. A second electrode layer is deposited to fill the removed portions of the laminated body.

    摘要翻译： 制造方法包括在基板上形成层叠体。 在层叠体上形成掩模层，然后去除掩模层的一部分以形成开口。 然后，使用掩模层作为模板，去除层叠体的第一部分，以暴露层叠体下方的基板的一部分。 处理衬底以改变掩模开口的尺寸和去除的第一部分之间的比率。 然后将可变电阻层沉积在掩模层，层压体和衬底的暴露部分上。 然后处理可变电阻层以去除覆盖衬底的至少一部分，以允许与下面的衬底接触。 沉积第二电极层以填充层压体的去除部分。

    3D NON-VOLATILE MEMORY ARRAY UTILIZING METAL ION SOURCE
    9.
    发明申请
    3D NON-VOLATILE MEMORY ARRAY UTILIZING METAL ION SOURCE 有权

    公开(公告)号：US20170271360A1

    公开(公告)日：2017-09-21

    申请号：US15264919

    申请日：2016-09-14

    申请人： Kabushiki Kaisha Toshiba

    发明人： Shosuke FUJII ,  Kazuhiko Yamamoto

    IPC分类号： H01L27/115 ,  G11C16/04 ,  G11C16/06 ,  H01L23/528

    CPC分类号： H01L27/11582 ,  G11C16/0433 ,  G11C16/0483 ,  G11C16/10 ,  G11C16/14 ,  G11C16/26 ,  H01L23/5283 ,  H01L27/1157 ,  H01L45/085

    摘要： According to one embodiment, a semiconductor memory device includes a semiconductor layer, a plurality of conductive layers, a plurality of insulating layers, an intermediate layer, and a controller. The conductive layers and the insulating layers are alternately provided. The intermediate layer is provided between the plurality of conductive layers and the semiconductor layer. The controller is configured to perform first and second operations. In first operation, the controller applies a first voltage to the semiconductor layer, applies a second voltage higher than the first voltage to a first conductive layer, and applies a third voltage to other conductive layers. In the second operation, the controller applies a fourth voltage to the semiconductor layer, applies a fifth voltage to the first conductive layer, and applies a sixth voltage to the other conductive layers.