MEMORY SYSTEM
    6.
    发明申请
    MEMORY SYSTEM 有权
    记忆系统

    公开(公告)号:US20140281154A1

    公开(公告)日:2014-09-18

    申请号:US13933812

    申请日:2013-07-02

    IPC分类号: G06F12/02

    摘要: According to one embodiment, there is provided a memory system that is connected to a host apparatus. The memory system includes a transmitting port and a controller. The transmitting port transmits a transmission signal to the host apparatus. The controller includes a first output interface that is connected to the transmitting port and a second output interface that is connected to the transmitting port. The memory system is configured such that a drivability of an output from the first output interface is larger than a drivability of an output from the second output interface in a first mode.

    摘要翻译: 根据一个实施例,提供了一种连接到主机设备的存储器系统。 存储器系统包括发送端口和控制器。 发送端口向主机发送发送信号。 控制器包括连接到发送端口的第一输出接口和连接到发送端口的第二输出接口。 存储器系统被配置为使得来自第一输出接口的输出的驾驶能力大于第一模式中的来自第二输出接口的输出的驾驶性能。

    Storage system
    7.
    发明授权

    公开(公告)号:US09658802B2

    公开(公告)日:2017-05-23

    申请号:US14205858

    申请日:2014-03-12

    IPC分类号: G06F3/06 G06F11/10

    摘要: According to one embodiment, a storage system includes a plurality of memory nodes that are connected to each other in two or more different directions and a connection unit. The connection unit issues a command in response to a request from the outside. In the storage system, a plurality of logical memory nodes are constructed by allocating, to one logical memory node, memory nodes including at least one first memory node which stores data to be accessed by the command and a second memory node which stores redundant data of the data stored in the first memory node. The command includes a first address which designates one of the plurality of logical memory nodes and a second address which designates a storage position in a memory space allocated to each logical memory node.

    INFORMATION PROCESSING DEVICE, NON-TRANSITORY COMPUTER READABLE RECORDING MEDIUM, AND INFORMATION PROCESSING SYSTEM
    9.
    发明申请
    INFORMATION PROCESSING DEVICE, NON-TRANSITORY COMPUTER READABLE RECORDING MEDIUM, AND INFORMATION PROCESSING SYSTEM 有权
    信息处理设备,非终端计算机可读记录介质和信息处理系统

    公开(公告)号:US20160170903A1

    公开(公告)日:2016-06-16

    申请号:US14656413

    申请日:2015-03-12

    IPC分类号: G06F12/10

    摘要: According to one embodiment, an information processing device includes a nonvolatile memory, assignment unit, and transmission unit. The assignment unit assigns logical address spaces to spaces. Each of the spaces is assigned to at least one write management area included in a nonvolatile memory. The write management area is a unit of an area which manages the number of write. The transmission unit transmits a command for the nonvolatile memory and identification data of a space assigned to a logical address space corresponding to the command.

    摘要翻译: 根据一个实施例,信息处理设备包括非易失性存储器,分配单元和传输单元。 分配单位将逻辑地址空间分配给空格。 每个空格被分配给包括在非易失性存储器中的至少一个写入管理区域。 写入管理区域是管理写入次数的区域的单位。 发送单元发送用于非易失性存储器的命令和分配给与该命令对应的逻辑地址空间的空间的识别数据。

    Non-volatile memory device, control method for information processing device, and information processing device
    10.
    发明授权
    Non-volatile memory device, control method for information processing device, and information processing device 有权
    非易失性存储装置,信息处理装置的控制方法以及信息处理装置

    公开(公告)号:US09367444B2

    公开(公告)日:2016-06-14

    申请号:US13789149

    申请日:2013-03-07

    发明人: Daisuke Hashimoto

    IPC分类号: G06F12/02 G06F21/79

    摘要: A storage device for a host device includes a non-volatile semiconductor memory and a control section configured to execute a delete process in response to a command from the host device to delete data stored at locations in the non-volatile semiconductor memory corresponding to a selected logical address included in the command. The delete process includes determining a selected mapping and at least one prior mapping of the selected logical address to physical addresses of the non-volatile semiconductor memory, and erasing or overwriting the data stored at the physical addresses.

    摘要翻译: 用于主机设备的存储设备包括非易失性半导体存储器和控制部分,其被配置为响应于来自主机设备的命令执行删除处理,以删除存储在非易失性半导体存储器中对应于所选择的非易失性半导体存储器中的位置的数据 逻辑地址包含在命令中。 所述删除处理包括确定所选择的映射以及所选择的逻辑地址与所述非易失性半导体存储器的物理地址的至少一个先前映射,以及擦除或覆盖存储在所述物理地址处的数据。