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    CHIP SCALE LIGHT EMITTING DEVICE PACKAGE WITH DOME
    3.
    发明申请
    CHIP SCALE LIGHT EMITTING DEVICE PACKAGE WITH DOME 有权
    芯片灯泡发光设备包装与DOME

    公开(公告)号：US20160118554A1

    公开(公告)日：2016-04-28

    申请号：US14892193

    申请日：2014-05-05

    Applicant: KONINKLIJKE PHILIPS N.V.

    Inventor： Salman Akram ,  Jyoti Kiron Bhardwaj

    IPC: H01L33/54 ,  H01L33/50 ,  H01L33/60

    CPC classification number: H01L33/54 ,  H01L33/0079 ,  H01L33/486 ,  H01L33/502 ,  H01L33/60 ,  H01L2933/0041 ,  H01L2933/005 ,  H01L2933/0058

    Abstract: Light Emitting Devices (LEDs) are fabricated on a wafer substrate with one or more thick metal layers that provide structural support to each LED. The streets, or lanes, between individual LEDs do not include this metal, and the wafer can be easily sliced/diced into singulated self-supporting LEDs. Because these devices are self-supporting, a separate support submount is not required. Before singulation, further processes may be applied at the wafer-level; after singulation, these self-supporting LEDs may be picked and placed upon an intermediate substrate for further processing as required. In an embodiment of this invention, protective optical domes are formed over the light emitting devices at the wafer-level or while the light emitting devices are situated on the intermediate substrate.

    Abstract translation: 发光器件（LED）在具有一个或多个厚金属层的晶片衬底上制造，所述厚金属层为每个LED提供结构支撑。 单个LED之间的街道或车道不包括该金属，并且可以容易地将晶片切片/切割成单独的自支撑LED。 因为这些设备是自支持的，所以不需要单独的支持子安装。 在分割之前，可以在晶片级应用进一步的工艺; 在分离之后，可以将这些自支撑LED拾取并放置在中间基板上，以便根据需要进一步处理。 在本发明的一个实施例中，保护性光学圆顶形成在晶片级上的发光器件上，或者当发光器件位于中间衬底上时。

    LASER DE-BOND OF CARRIER WAFER FROM DEVICE WAFTER
    4.
    发明申请
    LASER DE-BOND OF CARRIER WAFER FROM DEVICE WAFTER 审中-公开
    载体波形的激光去耦从器件WAFTER

    公开(公告)号：US20150228849A1

    公开(公告)日：2015-08-13

    申请号：US14423162

    申请日：2013-08-12

    Applicant: KONINKLIJKE PHILIPS N.V.

    Inventor： Quanbo Zou ,  Salman Akram ,  Jerome Chandra Bhat ,  Minh Ngoc Trieu ,  Robert Blank

    IPC: H01L33/00 ,  H01L25/00 ,  H01L21/768 ,  H01L21/78 ,  H01L23/00

    Abstract: In one embodiment, a semiconductor device wafer (10) contains electrical components and has electrodes (28) on a first side of the device wafer (10). A transparent carrier wafer (30) is bonded to the first side of the device wafer (10) using a bonding material (32) (e.g., a polymer or metal). The second side of the device wafer (10) is then processed, such as thinned, while the carrier wafer (30) provides mechanical support for the device wafer (10). The carrier wafer (30) is then de-bonded from the device wafer (10) by passing a laser beam (46) through the carrier wafer (30), the carrier wafer (30) being substantially transparent to the wavelength of the beam. The beam impinges on the bonding material (32), which absorbs the beam's energy, to break the chemical bonds between the bonding material (32) and the carrier wafer (30). The released carrier wafer (30) is then removed from the device wafer (10), and the residual bonding material is cleaned from the device wafer (10).

    Abstract translation: 在一个实施例中，半导体器件晶片（10）包含电子部件，并且在器件晶片（10）的第一侧上具有电极（28）。 使用接合材料（32）（例如聚合物或金属）将透明载体晶片（30）结合到器件晶片（10）的第一侧。 然后，当载体晶片（30）为器件晶片（10）提供机械支撑时，器件晶片（10）的第二侧被处理，例如变薄。 然后，通过使激光束（46）穿过载体晶片（30）将载体晶片（30）从器件晶片（10）去结合，载体晶片（30）对于波束的波长基本上是透明的。 光束撞击吸收光束能量的接合材料（32），以破坏接合材料（32）和载体晶片（30）之间的化学键。 然后将释放的载体晶片（30）从器件晶片（10）移除，并且从器件晶片（10）清除残留的接合材料。

    LED WITH STRESS-BUFFER LAYER UNDER METALLIZATION LAYER
    5.
    发明申请
    LED WITH STRESS-BUFFER LAYER UNDER METALLIZATION LAYER 审中-公开

    公开(公告)号：US20170358715A1

    公开(公告)日：2017-12-14

    申请号：US15581204

    申请日：2017-04-28

    Applicant: KONINKLIJKE PHILIPS N.V.

    Inventor： Salman Akram ,  Quanbo Zou

    IPC: H01L33/44 ,  H01L33/48 ,  H01L33/00 ,  H01L33/62

    CPC classification number: H01L33/44 ,  H01L33/0066 ,  H01L33/0079 ,  H01L33/486 ,  H01L33/62 ,  H01L2933/0016 ,  H01L2933/0025 ,  H01L2933/0066

    Abstract: Semiconductor LED layers are epitaxially grown on a patterned surface of a sapphire substrate. The patterned surface improves light extraction. The LED layers include a p-type layer and an n-type layer. The LED layers are etched to expose the n-type layer. One or more first metal layers are patterned to electrically contact the p-type layer and the n-type layer to form a p-metal contact and an n-metal contact. A dielectric polymer stress-buffer layer is spin-coated over the first metal layers to form a substantially planar surface over the first metal layers. The stress-buffer layer has openings exposing the p-metal contact and the n-metal contact. Metal solder pads are formed over the stress-buffer layer and electrically contact the p-metal contact and the n-metal contact through the openings in the stress-buffer layer. The stress-buffer layer acts as a buffer to accommodate differences in CTEs of the solder pads and underlying layers.

    LED with stress-buffer layer under metallization layer
    7.
    发明授权
    LED with stress-buffer layer under metallization layer 有权

    公开(公告)号：US09640729B2

    公开(公告)日：2017-05-02

    申请号：US14902001

    申请日：2014-06-23

    Applicant: KONINKLIJKE PHILIPS N.V.

    Inventor： Salman Akram ,  Quanbo Zou

    IPC: H01L33/44 ,  H01L33/62 ,  H01L33/48 ,  H01L33/00

    CPC classification number: H01L33/44 ,  H01L33/0066 ,  H01L33/0079 ,  H01L33/486 ,  H01L33/62 ,  H01L2933/0016 ,  H01L2933/0025 ,  H01L2933/0066

    Abstract: Semiconductor LED layers are epitaxially gown on a patterned surface of a sapphire substrate (10). The patterned surface improves light extraction. The LED layers include a p-type layer and an n-type layer. The LED layers are etched to expose the n-type layer. One or more first metal layers are patterned to electrically contact the p-type layer and the n-type layer to form a p-metal contact (32) and an n-metal contact (33). A dielectric polymer stress-buffer layer (36) is spin-coated over the first metal layers to form a substantially planar surface over the first metal layers. The stress-buffer layer has openings exposing the p-metal contact and the n-metal contact. Metal solder pads (44, 45) are formed over the stress-buffer layer and electrically contact the p-metal contact and the n-metal contact through the openings in the stress-buffer layer. The stress-buffer layer acts as a buffer to accommodate differences in CTEs of the solder pads and underlying layers.

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