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    SEMICONDUCTOR MEMORY DEVICE HAVING A VERTICAL ACTIVE REGION
    1.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE HAVING A VERTICAL ACTIVE REGION 审中-公开

    公开(公告)号：US20190393269A1

    公开(公告)日：2019-12-26

    申请号：US16018384

    申请日：2018-06-26

    申请人： International Business Machines Corporation

    发明人： JUNTAO LI ,  Kangguo Cheng ,  TAKASHI ANDO ,  DEXIN KONG

    IPC分类号： H01L27/24 ,  H01L45/00

    摘要： Embodiments of the invention provide a semiconductor memory device. In some embodiments, the device includes a bottom electrode extending in a y-direction relative to top surface of a substrate and a top electrode extending in an x-direction relative to the top surface of the substrate. An active area is located at the cross-section between the bottom electrode and the top electrode and is located on vertical side walls extending in a z-direction of the semiconductor memory device with respect to the top surface of the substrate. An insulating layer is located in the active area in between the top electrode and the bottom electrode.

    STACKED RESISTIVE RANDOM ACCESS MEMORY WITH INTEGRATED ACCESS TRANSISTOR AND HIGH DENSITY LAYOUT
    3.
    发明申请
    STACKED RESISTIVE RANDOM ACCESS MEMORY WITH INTEGRATED ACCESS TRANSISTOR AND HIGH DENSITY LAYOUT 审中-公开

    公开(公告)号：US20200312912A1

    公开(公告)日：2020-10-01

    申请号：US16368065

    申请日：2019-03-28

    申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

    发明人： REINALDO VEGA ,  TAKASHI ANDO ,  HARI MALLELA ,  Li-Wen Hung

    IPC分类号： H01L27/24 ,  H01L45/00 ,  G11C13/00

    摘要： A stacked resistive random access memory (ReRAM) structure is provided. The stacked ReRAM structure includes a channel, a ReRAM cell sub-structure and a contact via sub-structure. The ReRAM cell structure includes ReRAM cell, drain, gate and source layers, which are insulated from one another and respectively disposed in operative contact with the channel. The contact via sub-structures includes first, second, third and fourth contact vias, which are separate from one another. The first contact via is disposed in exclusive operative contact with the ReRAM cell layer. The second contact via is disposed in exclusive operative contact with the drain layer. The third contact via is disposed in exclusive operative contact with the gate layer. The fourth contact via is disposed in exclusive operative contact with the source layer.

    PROTUBERANT CONTACTS FOR RESISTIVE SWITCHING DEVICE
    4.
    发明申请
    PROTUBERANT CONTACTS FOR RESISTIVE SWITCHING DEVICE 审中-公开

    公开(公告)号：US20190207110A1

    公开(公告)日：2019-07-04

    申请号：US16252774

    申请日：2019-01-21

    申请人： International Business Machines Corporation

    发明人： TAKASHI ANDO ,  Chih-Chao Yang ,  Lawrence A. Clevenger

    IPC分类号： H01L45/00 ,  G11C13/00 ,  H01L27/24

    摘要： Embodiments of the invention are directed to a resistive switching device (RSD) that includes a first terminal, a second terminal, an active region having a switchable conduction state, and a protuberant contact communicatively coupled to the first terminal. The protuberant contact is configured to communicatively couple the first terminal through a first barrier liner to a first electrode line of a crossbar array. In embodiments of the invention, the protuberant contact is positioned with respect to the first barrier liner such that the first barrier liner does not impacting the switchable conduction state of the active region. In embodiments of the invention, the protuberant contact is positioned with respect to the first barrier liner such that the first barrier liner does not directly contact the first terminal.

    METAL-OXIDE-BASED NEUROMORPHIC DEVICE
    7.
    发明申请
    METAL-OXIDE-BASED NEUROMORPHIC DEVICE 有权

    公开(公告)号：US20210020780A1

    公开(公告)日：2021-01-21

    申请号：US16513871

    申请日：2019-07-17

    申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

    发明人： JOHN ROZEN ,  TAKASHI ANDO ,  TEODOR KRASSIMIROV TODOROV ,  JIANSHI TANG

    IPC分类号： H01L29/786 ,  H01L29/24 ,  G06N3/063

    摘要： A neuromorphic device includes a metal-oxide channel layer that has a variable-resistance between a first terminal and a second terminal. The neuromorphic device further includes a metal-oxide charge transfer layer over the metal-oxide channel layer that causes the metal-oxide channel layer to vary in resistance based on charge exchange between the metal-oxide charge transfer layer and the metal-oxide channel layer in accordance with an applied input signal. The neuromorphic device further includes a third terminal that applies the signal to the metal-oxide charge transfer layer and the metal-oxide channel layer.

    SEMICONDUCTOR MEMORY DEVICE HAVING A VERTICAL ACTIVE REGION
    8.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE HAVING A VERTICAL ACTIVE REGION 审中-公开

    公开(公告)号：US20200091245A1

    公开(公告)日：2020-03-19

    申请号：US16691724

    申请日：2019-11-22

    申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

    发明人： JUNTAO LI ,  Kangguo Cheng ,  TAKASHI ANDO ,  DEXIN KONG

    IPC分类号： H01L27/24 ,  H01L45/00

    摘要： Embodiments of the invention provide a semiconductor memory device. In some embodiments, the device includes a bottom electrode extending in a y-direction relative to top surface of a substrate and a top electrode extending in an x-direction relative to the top surface of the substrate. An active area is located at the cross-section between the bottom electrode and the top electrode and is located on vertical side walls extending in a z-direction of the semiconductor memory device with respect to the top surface of the substrate. An insulating layer is located in the active area in between the top electrode and the bottom electrode.