公开(公告)号：US10260961B2

公开(公告)日：2019-04-16

申请号：US14975938

申请日：2015-12-21

申请人： Intel Corporation

发明人： Shelby Ferguson ,  Rashelle Yee ,  Russell S. Aoki ,  Michael Hui ,  Jonathon Robert Carstens ,  Joseph J. Jasniewski

IPC分类号： G01K7/00 ,  G01K1/00 ,  G01K7/16 ,  H01L23/34 ,  H01L23/00 ,  H01L23/31 ,  H01L23/473 ,  H01L25/065

摘要： Disclosed herein are integrated circuit (IC) packages with temperature sensor traces, and related systems, devices, and methods. In some embodiments, an IC package may include a package substrate and an IC die disposed on the package substrate, wherein the package substrate includes a temperature sensor trace, and an electrical resistance of the temperature sensor trace is representative of an equivalent temperature of the temperature sensor trace.

公开(公告)号：US20170181271A1

公开(公告)日：2017-06-22

申请号：US14975941

申请日：2015-12-21

申请人： Intel Corporation

发明人： Rashelle Yee ,  Russell S. Aoki ,  Shelby Ferguson ,  Michael Hui ,  Jonathon Robert Carstens ,  Joseph J. Jasniewski ,  Kevin J. Ceurter

IPC分类号： H05K1/02 ,  H01L23/498 ,  G06F1/16 ,  B23K1/00 ,  B23K31/02 ,  H05K1/14 ,  H05B1/02

CPC分类号： H05K1/0271 ,  B23K1/0016 ,  B23K2101/42 ,  H01L23/49816 ,  H01L23/49833 ,  H01L23/49838 ,  H01L2224/16225 ,  H01L2924/15311 ,  H05B1/0233 ,  H05K1/0212 ,  H05K1/141 ,  H05K2201/041 ,  H05K2201/10378

摘要： Disclosed herein are apparatus, systems, and methods for warpage mitigation in printed circuit board (PCB) assemblies. In some embodiments, a PCB assembly for warpage mitigation may include: a PCB; an interposer disposed on the PCB, wherein the interposer has a first face and an opposing second face, the first face is disposed between the second face and the PCB, conductive contacts are disposed at the second face, solder is disposed on the conductive contacts, the interposer includes a first heater trace proximate to the conductive contacts, and, when a first power is dissipated in the first heater trace, the first heater trace is to generate heat to cause the solder disposed on the conductive contacts to melt; wherein the PCB includes a second heater trace.

公开(公告)号：US10178763B2

公开(公告)日：2019-01-08

申请号：US14975941

申请日：2015-12-21

申请人： Intel Corporation

发明人： Rashelle Yee ,  Russell S. Aoki ,  Shelby Ferguson ,  Michael Hui ,  Jonathon Robert Carstens ,  Joseph J. Jasniewski ,  Kevin J. Ceurter

IPC分类号： H05K1/02 ,  H01L23/498 ,  H05B1/02 ,  B23K1/00 ,  H05K1/14 ,  B23K101/42

摘要： Disclosed herein are apparatus, systems, and methods for warpage mitigation in printed circuit board (PCB) assemblies. In some embodiments, a PCB assembly for warpage mitigation may include: a PCB; an interposer disposed on the PCB, wherein the interposer has a first face and an opposing second face, the first face is disposed between the second face and the PCB, conductive contacts are disposed at the second face, solder is disposed on the conductive contacts, the interposer includes a first heater trace proximate to the conductive contacts, and, when a first power is dissipated in the first heater trace, the first heater trace is to generate heat to cause the solder disposed on the conductive contacts to melt; wherein the PCB includes a second heater trace.

公开(公告)号：US20170176260A1

公开(公告)日：2017-06-22

申请号：US14975938

申请日：2015-12-21

申请人： INTEL CORPORATION

发明人： Shelby Ferguson ,  Rashelle Yee ,  Russell S. Aoki ,  Michael Hui ,  Jonathon Robert Carstens ,  Joseph J. Jasniewski

IPC分类号： G01K7/16 ,  H01L23/34

CPC分类号： G01K7/16 ,  H01L23/3128 ,  H01L23/34 ,  H01L23/345 ,  H01L23/473 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L25/0655 ,  H01L2223/6677 ,  H01L2224/0401 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81139 ,  H01L2224/81193 ,  H01L2224/81234 ,  H01L2224/81815 ,  H01L2224/81908 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/1579 ,  H01L2924/16251 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/014 ,  H01L2224/45099

摘要： Disclosed herein are integrated circuit (IC) packages with temperature sensor traces, and related systems, devices, and methods. In some embodiments, an IC package may include a package substrate and an IC die disposed on the package substrate, wherein the package substrate includes a temperature sensor trace, and an electrical resistance of the temperature sensor trace is representative of an equivalent temperature of the temperature sensor trace.

公开(公告)号：US09991223B2

公开(公告)日：2018-06-05

申请号：US14975532

申请日：2015-12-18

申请人： Intel Corporation

发明人： Russell S. Aoki ,  Michael R. Hui ,  Jonathon R. Carstens ,  Michael S. Brazel ,  Daniel P. Carter ,  Thomas A. Boyd ,  Shelby A. Ferguson ,  Rashelle Yee ,  Joseph J. Jasniewski ,  Harvey R. Kofstad ,  Anthony P. Valpiani

IPC分类号： B23K3/08 ,  H04L23/00 ,  H01L23/00 ,  B23K1/00 ,  B23K101/42

CPC分类号： H01L24/75 ,  B23K1/0016 ,  B23K3/087 ,  B23K2101/42 ,  H01L23/49816 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2224/75253 ,  H01L2224/75703 ,  H01L2224/75754 ,  H01L2224/81139 ,  H01L2224/81234 ,  H01L2924/15311 ,  H05K3/325 ,  H05K3/3436 ,  H05K2201/10303 ,  H05K2201/10318 ,  H05K2201/10378 ,  H05K2201/10734 ,  H05K2203/166 ,  H05K2203/167 ,  Y02P70/613

摘要： Embodiments of the present disclosure describe package alignment frames for a local reflow process to attach a semiconductor package to an interposer. The frame may comprise a two frame system. The interposer may be on a mounting table or on a circuit board. The frame may include a body with a rectangular opening dimensioned to receive a semiconductor package to be coupled to the interposer. The frame may be to align a ball grid array of the semiconductor package with pads of the interposer. A second frame may be to receive the first frame and may be to align a ball grid array of the interposer with pads of the circuit board. A single frame may be used to couple a semiconductor package to an interposer and to couple the interposer to a circuit board. Other embodiments may be described and/or claimed.

公开(公告)号：US20170178994A1

公开(公告)日：2017-06-22

申请号：US14975943

申请日：2015-12-21

申请人： Intel Corporation

发明人： Michael Hui ,  Rashelle Yee ,  Jonathan Thibado ,  Daniel P. Carter ,  Shelby Ferguson ,  Anthony P. Valpiani ,  Russell S. Aoki ,  Jonathon Robert Carstens ,  Joseph J. Jasniewski ,  Harvey R. Kofstad ,  Michael Brazel ,  Tracy Clack ,  Viktor Vogman ,  Penny Woodcock ,  Kevin J. Ceurter ,  Hongfei Yan

IPC分类号： H01L23/34 ,  H01L21/48 ,  H01L23/498

CPC分类号： H01L23/345 ,  H01L21/4853 ,  H01L21/4871 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/50 ,  H01L23/5385 ,  H01L23/5386 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L25/0655 ,  H01L2223/6677 ,  H01L2224/0401 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/81234 ,  H01L2224/81815 ,  H01L2224/81908 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/1579 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2224/45099 ,  H01L2924/00

摘要： Disclosed herein are integrated circuit (IC) package support structures, and related systems, devices, and methods. In some embodiments, an IC package support structure may include a first heater trace, and a second heater trace, wherein the second heater trace is not conductively coupled to the first heater trace in the IC package support structure.