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公开(公告)号：US20230124426A1
公开(公告)日：2023-04-20
申请号：US17895596
申请日：2022-08-25
发明人： Hayato NAKANO
摘要： There is provided a semiconductor module capable of preventing the adhesion of an epoxy resin to terminals to which at least one of a large current and a high voltage is supplied. A semiconductor module includes: a sealing section formed of an epoxy resin and sealing transistors; an intermediate terminal having a fastening surface to which a cable connected to a load as a drive target is fastened in a direction intersecting the thickness direction of a sealing section and connected to the transistors; and a structure arranged between the sealing section and the fastening surface and having an input section higher than a surface of the sealing section and the fastening surface.
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公开(公告)号：US20200006237A1
公开(公告)日：2020-01-02
申请号：US16429071
申请日：2019-06-03
发明人： Hayato NAKANO
IPC分类号： H01L23/538 , H01L49/02
摘要： Provided is a semiconductor device including an input terminal including a P terminal and an N terminal; a laminated circuit substrate connected to the input terminal; a power substrate provided above the laminated circuit substrate; a connecting section electrically connecting the laminated circuit substrate and the power substrate; a capacitor provided in a conduction path between the P terminal and the N terminal; and a resistor provided in series with the capacitor in the conduction path between the P terminal and the N terminal. The capacitor may be provided in a region where the input terminal or the connecting section is provided, in an overhead view.
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公开(公告)号：US20240079382A1
公开(公告)日：2024-03-07
申请号：US18504494
申请日：2023-11-08
发明人： Hayato NAKANO
IPC分类号： H01L25/07 , H01L21/56 , H01L23/057 , H01L23/31
CPC分类号： H01L25/072 , H01L21/56 , H01L23/057 , H01L23/3107 , H01L24/73 , H01L2924/13055
摘要： A semiconductor device including a semiconductor chip, an insulating circuit board having a circuit pattern formed on an insulating plate, a case including a frame part having an opening that is substantially rectangular in a plan view of the semiconductor device, inner wall surfaces of the frame part at the opening forming a storage part to store the insulating circuit board, and a printed circuit board which has a flat plate shape and which protrudes from one of the inner wall surfaces of the frame part toward the storage part. The semiconductor device further includes a sealing material filled in the storage part, to thereby seal the semiconductor chip and the printed circuit board. A front surface of the sealing material forms a sealing surface, and in a thickness direction of the semiconductor chip, the sealing surface is higher around the printed circuit board than around the semiconductor chip.
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公开(公告)号：US20200258834A1
公开(公告)日：2020-08-13
申请号：US16735696
申请日：2020-01-07
发明人： Hayato NAKANO
摘要： An external connection terminal of a semiconductor module is provided. The external connection terminal includes a conductor having an upper surface and a lower surface; a plated layer configured to cover the upper surface of the conductor; and a nut provided on the lower surface-side of the conductor for receiving a screw penetrating the conductor. The plated layer includes a low contact resistance region overlapping a region in which the nut is provided, and a high contact resistance region that is a region except the low contact resistance region, as seen from above, and the plated layer includes a convex portion and a concave portion on a surface in the high contact resistance region.
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公开(公告)号：US20160197170A1
公开(公告)日：2016-07-07
申请号：US15070429
申请日：2016-03-15
IPC分类号： H01L29/739 , H01L29/08 , H01L29/423 , H01L29/66 , H01L29/167 , H01L21/265 , H01L21/324 , H01L21/285 , H01L29/10 , H01L29/06
CPC分类号： H01L29/7397 , H01L21/26513 , H01L21/2855 , H01L21/324 , H01L29/0615 , H01L29/0619 , H01L29/0804 , H01L29/0821 , H01L29/0834 , H01L29/0847 , H01L29/1004 , H01L29/1095 , H01L29/167 , H01L29/36 , H01L29/4236 , H01L29/66348 , H01L29/7395
摘要： In some aspects of the invention, an n-type field-stop layer can have a total impurity of such an extent that a depletion layer spreading in response to an application of a rated voltage stops inside the n-type field-stop layer together with the total impurity of an n− type drift layer. Also, the n-type field-stop layer can have a concentration gradient such that the impurity concentration of the n-type field-stop layer decreases from a p+ type collector layer toward a p-type base layer, and the diffusion depth is 20μm or more. Furthermore, an n+ type buffer layer of which the peak impurity concentration can be higher than that of the n-type field-stop layer at 6×1015 cm−3 or more, and one-tenth or less of the peak impurity concentration of the p+ type collector layer, can be included between the n-type field-stop layer and p+ type collector layer.
摘要翻译： 在本发明的一些方面，n型场致发光层可以具有如下程度的总杂质：响应施加额定电压而扩展的耗尽层与n型场 - 停止层内部一起停止，连同 n型漂移层的总杂质。 此外，n型场致发光层可以具有浓度梯度，使得n型场致发光层的杂质浓度从p +型集电极层向p型基极层减小，扩散深度为20μm 或者更多。 此外，在6×10 15 cm -3以上的峰值杂质浓度可以比n型场致发光层的峰值杂质浓度高的n +型缓冲层，以及6×10 15 cm -3以上的峰值杂质浓度的十分之一以上 p +型集电极层可以包含在n型场停止层和p +型集电极层之间。
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公开(公告)号：US20230223441A1
公开(公告)日：2023-07-13
申请号：US18187683
申请日：2023-03-22
发明人： Hayato NAKANO
IPC分类号： H01L29/06 , H01L29/739 , H01L29/861 , H01L23/00
CPC分类号： H01L29/0696 , H01L29/7397 , H01L29/861 , H01L24/40 , H01L24/37 , H01L24/05 , H01L2224/37124 , H01L2224/37147 , H01L2224/37012 , H01L2224/37565 , H01L2224/37655 , H01L2224/40499 , H01L2224/40153 , H01L2924/01029 , H01L2924/0105 , H01L2924/01051 , H01L24/29 , H01L2224/29111 , H01L2224/2912 , H01L2224/29147 , H01L2924/014 , H01L24/32 , H01L2224/32225 , H01L24/73 , H01L2224/73263 , H01L2924/13055 , H01L2924/12036 , H01L2224/05624 , H01L2224/05638 , H01L2924/01014 , H01L2224/05647 , H01L2924/0132 , H01L2924/01033 , H01L2924/10253 , H01L2924/10272 , H01L2924/1033
摘要： Provided is a semiconductor device including: a transistor portion provided in a semiconductor substrate; and a diode portion provided in the semiconductor substrate, in which an area ratio of the transistor portion to the diode portion on a front surface of the semiconductor substrate is larger than 3.1 and smaller than 4.7. Provided is a semiconductor module including: a semiconductor device including a transistor portion and a diode portion provided in a semiconductor substrate; an external connection terminal electrically connected to the semiconductor device; and a coupling portion for electrically connecting the semiconductor device and the external connection terminal. The coupling portion may be in plane contact with a front surface electrode of the semiconductor device at a predetermined junction surface. An area ratio of the transistor portion to the diode portion may be larger than 2.8 and smaller than 4.7.
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公开(公告)号：US20210143147A1
公开(公告)日：2021-05-13
申请号：US17034611
申请日：2020-09-28
发明人： Hayato NAKANO
摘要： A semiconductor module includes: a first metal plate including a first mount part joined with a bottom-surface electrode of a first switching element, a second mount part joined with a positive-electrode terminal, and a first narrow part between the first and second mount parts and being narrower than a part jointing the first switching element to the first mount part and the positive-electrode terminal; a second metal plate being joined with a bottom-surface electrode of a second switching element, and connected to a top-surface electrode of the first switching element; a third metal plate including a sixth mount part joined with a negative-electrode terminal, a seventh mount part connected to a top-surface electrode of the second switching element, and being narrower than the negative-electrode terminal, and a second narrow part between the sixth and seventh mount parts; and a snubber circuit connecting the first and second narrow parts.
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公开(公告)号：US20190157221A1
公开(公告)日：2019-05-23
申请号：US16261521
申请日：2019-01-29
发明人： Shin SOYANO , Hayato NAKANO , Keiichi HIGUCHI , Akihiro OSAWA
IPC分类号： H01L23/64 , H01L23/495 , H01L23/00 , H02K11/33
摘要： A semiconductor module includes: a first lead frame connected to a plurality of semiconductor chips in a first arm circuit; a second lead frame connected to a plurality of semiconductor chips in a second arm circuit; a first main terminal connected to the first lead frame; and a second main terminal connected to the second lead frame, wherein each of the first lead frame and second lead frame has a facing part, a first terminal connection portion connected to the first main terminal is provided at a first end portion of the first lead frame, a second terminal connection portion connected to the second main terminal is provided at a second end portion of the second lead frame, and the first terminal connection portion and second terminal connection portion are arranged on opposite sides when viewed from the facing parts of the first lead frame and second lead frame.
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公开(公告)号：US20160211356A1
公开(公告)日：2016-07-21
申请号：US15084549
申请日：2016-03-30
IPC分类号： H01L29/739 , H01L29/08 , H01L29/167 , H01L29/06 , H01L29/36 , H01L29/10 , H01L29/423
CPC分类号： H01L29/7397 , H01L21/26513 , H01L21/2855 , H01L21/324 , H01L29/0615 , H01L29/0619 , H01L29/0804 , H01L29/0821 , H01L29/0834 , H01L29/0847 , H01L29/1004 , H01L29/1095 , H01L29/167 , H01L29/36 , H01L29/4236 , H01L29/66348 , H01L29/7395
摘要： In some aspects of the invention, an n-type field-stop layer can have a total impurity of such an extent that a depletion layer spreading in response to an application of a rated voltage stops inside the n-type field-stop layer together with the total impurity of an n− type drift layer. Also, the n-type field-stop layer can have a concentration gradient such that the impurity concentration of the n-type field-stop layer decreases from a p+ type collector layer toward a p-type base layer, and the diffusion depth is 20 μm or more. Furthermore, an n+ type buffer layer of which the peak impurity concentration can be higher than that of the n-type field-stop layer at 6×1015 cm−3 or more, and one-tenth or less of the peak impurity concentration of the p+ type collector layer, can be included between the n-type field-stop layer and p+ type collector layer.
摘要翻译： 在本发明的一些方面，n型场致发光层可以具有如下程度的总杂质：响应施加额定电压而扩展的耗尽层与n型场 - 停止层内部一起停止，连同 n型漂移层的总杂质。 此外，n型场致发光层可以具有浓度梯度，使得n型场致发光层的杂质浓度从p +型集电极层向p型基极层减小，扩散深度为20 μm以上。 此外，在6×10 15 cm -3以上的峰值杂质浓度可以比n型场致发光层的峰值杂质浓度高的n +型缓冲层，以及6×10 15 cm -3以上的峰值杂质浓度的十分之一以上 p +型集电极层可以包含在n型场停止层和p +型集电极层之间。
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公开(公告)号：US20240363507A1
公开(公告)日：2024-10-31
申请号：US18582566
申请日：2024-02-20
发明人： Hayato NAKANO
IPC分类号： H01L23/498 , H01L21/66
CPC分类号： H01L23/49811 , H01L22/12 , H01L22/32 , H01L23/49838
摘要： Provided is a semiconductor device including: a temperature sensing portion provided above a semiconductor substrate; a temperature sensing wiring portion electrically connected to the temperature sensing portion; and a protective film including a temperature sensing protective film provided above the temperature sensing portion and a first wiring protective film provided above the temperature sensing wiring portion, where the first wiring protective film includes: a first region adjacent to the temperature sensing protective film; and a second region provided more spaced apart from the temperature sensing protective film than the first region and having a width narrower than that of the first region.
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