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公开(公告)号:US20210328138A1
公开(公告)日:2021-10-21
申请号:US17270151
申请日:2019-08-22
发明人: Sanjeev AGGARWAL , Sarin DESHPANDE , Kerry NAGEL , Santosh KARRE
摘要: Fabrication of a magnetic memory element, including a via (125) in an interlevel dielectric layer (120), providing an electrical connection between an underlying metal region (110) and a magnetoresistive stack device, such as a magnetic tunnel junction (150), involves forming a transition metal layer (130) in the via by atomic layer deposition. The via optionally includes a tantalum-rich layer (140) above, and/or a cap layer (115) below, the transition metal layer, and may have a diameter less than or equal than a diameter of the magnetoresistive stack device.
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公开(公告)号:US20190115060A1
公开(公告)日:2019-04-18
申请号:US16157315
申请日:2018-10-11
CPC分类号: G11C11/161 , G11C11/1653 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C11/1693 , H01F10/3254 , H01F10/3272 , H01F10/3286 , H01F10/329 , H01L27/228 , H01L43/02
摘要: Spin-orbit-torque (SOT) control strip lines are provided along the sides of free layers in perpendicular magnetic tunnel junction devices. Current flowing through such SOT control strip lines injects spin current into the free layers such that spin torque is applied to the free layers. The spin torque can be used to force the magnetic state of the free layer to a particular state based on the direction of the current through the SOT control strip line. In other embodiments, the SOT provides an assist to spin-transfer torque generated by current flowing vertically through the magnetic tunnel junction. Some embodiments have dedicated strip lines for a single magnetic tunnel junction such that a three-terminal device results. Other embodiments have multiple magnetic tunnel junctions sharing a strip line, where the strip line can be used to reset all of the magnetic tunnel junctions to the same state and can also be used as an assist such that individual magnetic tunnel junctions can be written using selection circuitry.
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公开(公告)号:US20240306513A1
公开(公告)日:2024-09-12
申请号:US18664928
申请日:2024-05-15
发明人: Sanjeev AGGARWAL , Sarin DESHPANDE , Kerry NAGLE , Santosh KARRE
CPC分类号: H10N50/01 , H10N50/80 , H01F10/3254 , H01F10/3272 , H10B61/00
摘要: A magnetoresistive element may include a via providing an electrical connection between one or more metal regions and magnetoresistive devices. The via may include a transition metal layer, a tantalum-rich layer, and/or a cap layer. The transition metal layer may be formed by atomic layer deposition. Additionally, one or more layers of the via may be formed in the trench etched in one or more interlevel dielectric layers. The via may have an aspect ratio less than or equal to 2. The via may have a diameter less than or equal than a diameter of the magnetoresistive device electrically connected to one or more metal regions by the via.
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公开(公告)号:US20210359201A1
公开(公告)日:2021-11-18
申请号:US17285122
申请日:2019-10-29
发明人: Jijun SUN , Han-Jong CHIA , Sarin DESHPANDE , Ahmet DEMIRAY
摘要: A magnetoresistive stack includes a fixed magnetic region, one or more dielectric layers disposed on and in contact with the fixed magnetic region, and a free magnetic region disposed above the one or mom dielectric layers. The fixed magnetic region may include a first ferromagnetic region, a coupling layer, a second ferromagnetic region, a transition layer disposed, a reference layer, and at least one interfacial layer disposed above the second ferromagnetic region. Another interfacial layer may be disposed between the one or more dielectric layers and the free magnetic region.
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