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1.发明授权公开(公告)号：US09893275B2
公开(公告)日：2018-02-13
申请号：US15396700
申请日：2017-01-02
发明人： Sanjeev Aggarwal , Kerry Nagel , Jason Janesky
CPC分类号： H01L43/12 , G11C11/161 , H01L43/02 , H01L43/08 , H01L43/10
摘要： A magnetoresistive structure having two dielectric layers, and method of manufacturing same, includes a free magnetic layer positioned between the two dielectric layers. The method of manufacture comprises at least two etch processes and at least one encapsulation process interposed therebetween wherein the encapsulation is formed on sidewalls of the partially formed magnetoresistive stack between etch processes.
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2.发明授权公开(公告)号：US09093640B2
公开(公告)日：2015-07-28
申请号：US14219902
申请日：2014-03-19
发明人： Sanjeev Aggarwal , Kerry Nagel , Jason Janesky
IPC分类号： H01L43/12
CPC分类号： H01L43/12 , G11C11/161 , H01L43/02 , H01L43/08 , H01L43/10
摘要： A dual tunnel barrier magnetic element has a free magnetic layer positioned between first and second tunnel barriers and an electrode over the second tunnel barrier. A two step etch process allows for forming an encapsulation material on a side wall of the electrode and the second tunnel barrier subsequent to the first etch for preventing damage to the first tunnel barrier when performing the second etch to remove a portion of the free layer.
摘要翻译： 双隧道屏障磁性元件具有位于第一和第二隧道屏障之间的自由磁性层和位于第二隧道屏障上的电极。 两步蚀刻工艺允许在第一次蚀刻之后在电极的侧壁上形成封装材料，并且在进行第二蚀刻以去除自由层的一部分时防止第一隧道势垒的损坏。
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公开(公告)号：US12022738B2
公开(公告)日：2024-06-25
申请号：US17270151
申请日：2019-08-22
发明人： Sanjeev Aggarwal , Sarin Deshpande , Kerry Nagel , Santosh Karre
CPC分类号： H10N50/01 , H10N50/80 , H01F10/3254 , H01F10/3272 , H10B61/00
摘要： Fabrication of a magnetic memory element, including a via (125) in an interlevel dielectric layer (120), providing an electrical connection between an underlying metal region (110) and a magnetoresistive stack device, such as a magnetic tunnel junction (150), involves forming a transition metal layer (130) in the via by atomic layer deposition. The via optionally includes a tantalum-rich layer (140) above, and/or a cap layer (115) below, the transition metal layer, and may have a diameter less than or equal than a diameter of the magnetoresistive stack device.
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公开(公告)号：US09023219B2
公开(公告)日：2015-05-05
申请号：US13826658
申请日：2013-03-14
发明人： Sarin Deshpande , Sanjeev Aggarwal , Kerry Nagel
CPC分类号： G11B5/127 , G11C11/161 , H01L43/12 , Y10T29/49052
摘要： A method of manufacturing a magnetoresistive-based device includes a metal hard mask that is inert to a top electrode etch chemistry and that has low sputter yield during a magnetic stack sputter. The metal hard mask is patterned by the photo resist and the photo mask is then stripped and the top electrode (overlying magnetic materials of the magnetoresistive-based device) is patterned by the metal hard mask.
摘要翻译： 制造基于磁阻的器件的方法包括对顶部电极蚀刻化学物质是惰性的并且在磁堆栈溅射期间具有低的溅射产率的金属硬掩模。 金属硬掩模由光致抗蚀剂构图，然后剥离光掩模，并且通过金属硬掩模对顶部电极（基于磁阻的装置的覆盖磁性材料）进行图案化。
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公开(公告)号：US08790935B1
公开(公告)日：2014-07-29
申请号：US13801419
申请日：2013-03-13
CPC分类号： H01L43/12 , H01L21/76883 , H01L21/76898 , H01L23/544 , H01L27/222 , H01L2223/54426 , H01L2924/0002 , H01L2924/00
摘要： A method is provided for forming a first via with an electrically conductive material, for example, copper, that is formed over and coupled to a conductive landing pad of an MRAM array. A sputter step is performed to lower the surface of the first via below that of a surrounding dielectric material. This recess is repeated in subsequent processing steps, providing alignment marks for the formation of a magnetic tunnel junction. The magnetic tunnel junction may be offset from the first via, and a second via being formed above the magnetic tunnel junction and to a conductive layer.
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公开(公告)号：US11005031B2
公开(公告)日：2021-05-11
申请号：US16561418
申请日：2019-09-05
发明人： Kerry Nagel , Sanjeev Aggarwal
摘要： A magnetoresistive device may include a first plurality of magnetic tunnel junction (MTJ) bits arranged in a first XY plane, and a second plurality of MTJ bits arranged in a second XY plane that is spaced apart from the first XY plane in a Z direction. And, the MTJ bits of the first plurality of MTJ bits may be spaced apart from the MTJ bits of the second plurality of MTJ bits in the X and Y directions.
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7.发明授权公开(公告)号：US10230046B2
公开(公告)日：2019-03-12
申请号：US15856202
申请日：2017-12-28
发明人： Sanjeev Aggarwal , Kerry Nagel , Jason Janesky
摘要： A magnetoresistive structure having two dielectric layers, and method of manufacturing same, includes a free magnetic layer positioned between the two dielectric layers. The method of manufacture comprises at least two etch processes and at least one encapsulation process interposed therebetween wherein the encapsulation is formed on sidewalls of the partially formed magnetoresistive stack between etch processes. For example, an exemplary method of manufacturing a magnetoresistive device includes etching through a second electrode, second dielectric layer and free magnetic layer to provide a sidewall of (i) an unpinned synthetic antiferromagnetic structure, (ii) a second dielectric layer and (iii) a free magnetic layer; thereafter, forming an encapsulation material on the sidewall of the unpinned synthetic antiferromagnetic structure, second dielectric layer and free magnetic layer, and after forming the encapsulation material, etching through a first dielectric layer.
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8.发明授权公开(公告)号：US08877522B2
公开(公告)日：2014-11-04
申请号：US14283413
申请日：2014-05-21
IPC分类号： H01L21/00 , G11C11/00 , H01L43/12 , H01L21/768 , H01L27/22
CPC分类号： H01L43/12 , H01L21/76883 , H01L21/76898 , H01L23/544 , H01L27/222 , H01L2223/54426 , H01L2924/0002 , H01L2924/00
摘要： A method is provided for forming a first via with an electrically conductive material, for example, copper, that is formed over and coupled to a conductive landing pad of an MRAM array. A sputter step is performed to lower the surface of the first via below that of a surrounding dielectric material. This recess is repeated in subsequent processing steps, providing alignment marks for the formation of a magnetic tunnel junction. The magnetic tunnel junction may be offset from the first via, and a second via being formed above the magnetic tunnel junction and to a conductive layer.
摘要翻译： 提供了一种用于形成第一通孔的方法，其中导电材料例如铜形成在MRAM阵列的导电着陆焊盘上并耦合到MRAM阵列的导电着陆焊盘。 执行溅射步骤以将第一通孔的表面降低到低于周围电介质材料的表面。 在随后的处理步骤中重复该凹槽，提供用于形成磁性隧道结的对准标记。 磁性隧道结可以偏离第一通孔，并且第二通孔形成在磁性隧道结上方和导电层上。
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9.发明授权公开(公告)号：US11139429B2
公开(公告)日：2021-10-05
申请号：US16794449
申请日：2020-02-19
发明人： Sanjeev Aggarwal , Kerry Nagel , Jason Janesky
摘要： A magnetoresistive structure having two dielectric layers, and method of manufacturing same, includes a free magnetic layer positioned between the two dielectric layers. The method of manufacture comprises at least two etch processes and at least one encapsulation process interposed therebetween wherein the encapsulation is formed on sidewalls of the partially formed magnetoresistive stack between etch processes. For example, an exemplary method of manufacturing a magnetoresistive device includes etching through a second electrode, second dielectric layer and free magnetic layer to provide a sidewall of (i) an unpinned synthetic antiferromagnetic structure, (ii) a second dielectric layer and (iii) a free magnetic layer; thereafter, forming an encapsulation material on the sidewall of the unpinned synthetic antiferromagnetic structure, second dielectric layer and free magnetic layer, and after forming the encapsulation material, etching through a first dielectric layer.
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10.发明授权公开(公告)号：US10608172B2
公开(公告)日：2020-03-31
申请号：US16255912
申请日：2019-01-24
发明人： Sanjeev Aggarwal , Kerry Nagel , Jason Janesky
摘要： A magnetoresistive structure having two dielectric layers, and method of manufacturing same, includes a free magnetic layer positioned between the two dielectric layers. The method of manufacture comprises at least two etch processes and at least one encapsulation process interposed therebetween wherein the encapsulation is formed on sidewalls of the partially formed magnetoresistive stack between etch processes. For example, an exemplary method of manufacturing a magnetoresistive device includes etching through a second electrode, second dielectric layer and free magnetic layer to provide a sidewall of (i) an unpinned synthetic antiferromagnetic structure, (ii) a second dielectric layer and (iii) a free magnetic layer; thereafter, forming an encapsulation material on the sidewall of the unpinned synthetic antiferromagnetic structure, second dielectric layer and free magnetic layer, and after forming the encapsulation material, etching through a first dielectric layer.
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