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公开(公告)号:US5952716A
公开(公告)日:1999-09-14
申请号:US842859
申请日:1997-04-16
IPC分类号: H01L23/498 , H05K3/30 , H01L23/532
CPC分类号: H05K3/308 , H01L23/49811 , H01L23/49827 , H01L2924/0002 , H01L2924/15312 , Y10T29/49139 , Y10T29/49147 , Y10T29/49151 , Y10T29/49165 , Y10T29/49181 , Y10T29/49208
摘要: A pinning process including the steps of gold-plating through-holes in a laminate carrier and crimping a gold or gold-plated pin located in the through-holes to form a pin head on the top and a pin bulge on the bottom of the laminate carrier to produce a plastic pin grid array. A variety of mechanical forming processes may be employed to form the pin heads and pin bulges and cause the pin to at least partially, and preferably substantially, fill and contact the gold-plated through-hole including swage pinning, impact pinning, and double-die pinning operations. By combining the steps of gold-plating through-holes of a laminate carrier and using a mechanical pinning process to crimp a gold or gold-plated pin in the through-holes, a reliable mechanical and electrical connection may be established between the pin and the metal lines both inside and on the surface of the laminate carrier without the need for lead-containing solders and pastes.
摘要翻译: 一种钉扎工艺,包括在层叠载体中镀金通孔的步骤,并且压接位于通孔中的金或镀金销,以在顶部形成销头,并在层压体的底部上形成销凸起 载体产生塑料针格栅阵列。 可以采用各种机械成形工艺来形成销头和销凸起,并且使销至少部分地,优选地基本上填充和接触镀金通孔,包括模具钉扎,冲击钉扎和双重连接, 死亡钉扎操作。 通过结合层叠载体的镀金通孔的步骤,并使用机械钉扎工艺将金或镀金销压接在通孔中,可以在销和第二端之间建立可靠的机械和电连接 金属管线在层压载体的内部和表面上,而不需要含铅的焊料和糊料。
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公开(公告)号:US06438830B1
公开(公告)日:2002-08-27
申请号:US09292163
申请日:1999-04-15
IPC分类号: H01R4320
CPC分类号: H05K3/308 , H01L23/49811 , H01L23/49827 , H01L2924/0002 , H01L2924/15312 , Y10T29/49139 , Y10T29/49147 , Y10T29/49151 , Y10T29/49165 , Y10T29/49181 , Y10T29/49208 , H01L2924/00
摘要: A pinning process including the steps of gold-plating through-holes in a laminate carrier and crimping old or gold-plated pin located in the through-holes to form a pin head on the top and a pin bulge on the bottom of the laminate carrier to produce a plastic pin grid array. A variety of mechanical forming processes may be employed to form the pin heads and pin bulges and cause the pin to at least partially, and preferably substantially, fill and contact the gold-plated through-hole including swage pinning, impact pinning, and double-die pinning operations. By combining the steps of gold-plating through-holes of a laminate carrier and using a mechanical pinning process to crimp a gold or gold-plated pin in the through-holes, a reliable mechanical and electrical connection may be established between the pin and the metal lines both inside and on the surface of the laminate carrier without the need for lead-containing solders and pastes.
摘要翻译: 一种钉扎工艺,包括在叠层载体中镀金通孔的步骤,并且压接位于通孔中的旧镀金或镀金销,以在顶部形成销头,并在层压载体的底部上形成销凸起 生产塑料针格栅阵列。 可以采用各种机械成形工艺来形成销头和销凸起,并且使销至少部分地,优选地基本上填充和接触镀金通孔,包括模具钉扎,冲击钉扎和双重连接, 死亡钉扎操作。 通过结合层叠载体的镀金通孔的步骤,并使用机械钉扎工艺将金或镀金销压接在通孔中,可以在销和第二端之间建立可靠的机械和电连接 金属线在层压载体的内部和表面上,而不需要含铅焊料和糊料。
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公开(公告)号:US06212076B1
公开(公告)日:2001-04-03
申请号:US09259809
申请日:1999-02-26
IPC分类号: H05K720
CPC分类号: H05K1/0209 , H05K1/0206 , H05K1/0207 , H05K1/189 , H05K3/429 , H05K3/4691 , H05K2201/066 , H05K2201/09354 , H05K2201/09781 , H05K2201/10159 , H05K2201/10689
摘要: A printed circuit board is provided comprising a substrate, a conductor on the surface of the substrate, and an electronic component mounted on the conductor. The printed circuit board includes a first thermally conductive layer within the substrate and a second thermally conductive layer on a portion of the surface of the substrate and spaced from the electronic component. The electronic component is thermally coupled to the second thermally conductive layer by a thermally conductive aperture positioned within the substrate and connected to the conductor and the first thermally conductive layer. The first thermally conductive layer is connected to the second thermally conductive layer by a plurality of apertures also positioned in the substrate. Another printed circuit board is also provided comprising a first plurality of laminate dielectric layers, a conductor on a surface of the first plurality of laminated dielectric layers, and an electronic component mounted on the conductor. The printed circuit board includes a second plurality of laminated dielectric layers connected to the first plurality of laminated dielectric layers by a flexible web. The flexible web includes a first thermally conductive layer positioned within the first plurality of dielectric layers. A thermally conductive aperture thermally connects the electronic component to the first thermally conductive layer. A plurality of thermally conductive apertures is positioned within the second plurality of dielectric layers and thermally couples the first thermally conductive layer to a second thermally conductive layer which is included on a portion of a surface of the second plurality of dielectric layers and spaced from the electronic component. The flexible web portion thus allows positioning of the second thermally conductive layer in a plane remote from the electronic component when it is positioned in a confined space.
摘要翻译: 提供一种印刷电路板,包括基板,基板表面上的导体和安装在导体上的电子部件。 印刷电路板包括衬底内的第一导热层和在衬底的表面的一部分上并与电子部件隔开的第二导热层。 电子部件通过定位在衬底内并连接到导体和第一导热层的导热孔热耦合到第二导热层。 第一导热层通过也位于基板中的多个孔连接到第二导热层。 还提供了另一印刷电路板,其包括第一多个叠层电介质层,在第一多个叠层电介质层的表面上的导体和安装在导体上的电子部件。 印刷电路板包括通过柔性网连接到第一多个叠层电介质层的第二多个叠层电介质层。 柔性幅材包括位于第一多个电介质层内的第一导热层。 导热孔将电子部件热连接到第一导热层。 多个导热孔定位在第二多个介电层内并且将第一导热层热耦合到第二导热层,第二导热层包括在第二多个电介质层的表面的一部分上并与电子 零件。 柔性腹板部分因此允许第二导热层在位于密闭空间中时远离电子部件的平面定位。
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公开(公告)号:US06576549B2
公开(公告)日:2003-06-10
申请号:US10282275
申请日:2002-10-28
申请人: Frank D. Egitto , Elizabeth Foster , Raymond T. Galasco , David E. Houser , Mark L. Janecek , Thomas E. Kindl , Jeffrey A. Knight , Stephen W. MacQuarrie , Voya R. Markovich , Luis J. Matienzo , Amarjit S. Rai , David J. Russell , William T. Wike
发明人: Frank D. Egitto , Elizabeth Foster , Raymond T. Galasco , David E. Houser , Mark L. Janecek , Thomas E. Kindl , Jeffrey A. Knight , Stephen W. MacQuarrie , Voya R. Markovich , Luis J. Matienzo , Amarjit S. Rai , David J. Russell , William T. Wike
IPC分类号: H01L2131
CPC分类号: H01L21/486 , H01L23/49827 , H01L2224/16225 , H05K3/0032 , H05K3/0035 , H05K3/424 , H05K2201/0323 , H05K2203/1136
摘要: A method and structure for forming a metalized blind via. A dielectric layer is formed on a metallic layer, followed by laser drilling a depression in the dielectric layer such that a carbon film that includes the carbon is formed on a sidewall of the depression. If the laser drilling does not expose the metallic layer, then an anisotropic plasma etching, such as a reactive ion etching (RIE), may be used to clean and expose a surface of the metallic layer. The dielectric layer includes a dielectric material having a carbon based polymeric material, such as a permanent photoresist, a polyimide, and advanced solder mask (ASM). The metallic layer includes a metallic material, such as copper, aluminum, and gold. The carbon film is in conductive contact with the metallic layer, and the carbon film is sufficiently conductive to permit electroplating a continuous layer of metal (e.g., copper) directly on the carbon film without need of an electrolessly plated layer underneath the electroplated layer. The laser drilling is accomplished using a laser radiation having a wavelength between about 180 nanometers and about 600 nanometers. The depression may have any cross-sectional shape and any spatial distribution of depths. As an example, the depression may include a blind via, a rectangular channel, or a combination thereof.
摘要翻译: 用于形成金属化盲孔的方法和结构。 在金属层上形成电介质层,随后在电介质层中激光钻出凹陷,使得在凹陷的侧壁上形成包含碳的碳膜。 如果激光钻孔不暴露金属层,则可以使用诸如反应离子蚀刻(RIE)的各向异性等离子体蚀刻来清洁和暴露金属层的表面。 电介质层包括具有碳基聚合物材料的电介质材料,例如永久性光致抗蚀剂,聚酰亚胺和高级阻焊剂(ASM)。 金属层包括金属材料,例如铜,铝和金。 碳膜与金属层导电接触,并且碳膜具有足够的导电性,以允许直接在碳膜上电镀连续的金属层(例如铜),而不需要在电镀层下面的无电镀层。 激光钻孔使用波长在约180纳米和约600纳米之间的激光辐射完成。 凹陷可以具有任何横截面形状和深度的任何空间分布。 作为示例,凹陷可以包括盲孔,矩形通道或其组合。
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公开(公告)号:US20090059537A1
公开(公告)日:2009-03-05
申请号:US11847716
申请日:2007-08-30
IPC分类号: H05K7/20
CPC分类号: H05K7/20472 , H01L23/3675 , H01L23/42 , H01L2224/16 , H01L2224/73253 , H01L2924/15311 , H01L2924/16152
摘要: An electronic package device is disclosed including a microelectronic package and a heat sink positioned over the microelectronic package. A thermal interface element is positioned between the microelectronic package and the heat sink. The thermal interface element is elongated and has differing thicknesses along its length to enhance the dissipation of heat.
摘要翻译: 公开了一种包括微电子封装和位于微电子封装上方的散热器的电子封装器件。 热接口元件位于微电子封装和散热器之间。 热界面元件是细长的并且沿其长度具有不同的厚度以增强热耗散。
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公开(公告)号:US06522014B1
公开(公告)日:2003-02-18
申请号:US09670968
申请日:2000-09-27
申请人: Frank D. Egitto , Elizabeth Foster , Raymond T. Galasco , David E. Houser , Mark L. Janecek , Thomas E. Kindl , Jeffrey A. Knight , Stephen W. MacQuarrie , Voya R. Markovich , Luis J. Matienzo , Amarjit S. Rai , David J. Russell , William T. Wike
发明人: Frank D. Egitto , Elizabeth Foster , Raymond T. Galasco , David E. Houser , Mark L. Janecek , Thomas E. Kindl , Jeffrey A. Knight , Stephen W. MacQuarrie , Voya R. Markovich , Luis J. Matienzo , Amarjit S. Rai , David J. Russell , William T. Wike
IPC分类号: H01L2348
CPC分类号: H01L21/486 , H01L23/49827 , H01L2224/16225 , H05K3/0032 , H05K3/0035 , H05K3/424 , H05K2201/0323 , H05K2203/1136
摘要: A method and structure for forming a metalized blind via. A dielectric layer is formed on a metallic layer, followed by laser drilling a depression in the dielectric layer such that a carbon film that includes the carbon is formed on a sidewall of the depression. If the laser drilling does not expose the metallic layer, then an anisotropic plasma etching, such as a reactive ion etching (RIE), may be used to clean and expose a surface of the metallic layer. The dielectric layer comprises a dielectric material having a carbon based polymeric material, such as a permanent photoresist, a polyimide, and advanced solder mask (ASM). The metallic layer includes a metallic material, such as copper, aluminum, and gold. The carbon film is in conductive contact with the metallic layer, and the carbon film is sufficiently conductive to permit electroplating a continuous layer of metal (e.g., copper) directly on the carbon film without need of an electrolessly plated layer underneath the electroplated layer. The laser drilling is accomplished using a laser radiation having a wavelength between about 180 nanometers and about 600 nanometers. The depression may have any cross-sectional shape and any spatial distribution of depths. As an example, the depression may include a blind via, then the blind via may have any cross-sectional shape, such as circular or non-circular, a rectangular channel, or a combination thereof.
摘要翻译: 用于形成金属化盲孔的方法和结构。 在金属层上形成电介质层,随后在电介质层中激光钻出凹陷,使得在凹陷的侧壁上形成包含碳的碳膜。 如果激光钻孔不暴露金属层,则可以使用诸如反应离子蚀刻(RIE)的各向异性等离子体蚀刻来清洁和暴露金属层的表面。 电介质层包括具有碳基聚合物材料的介电材料,例如永久性光致抗蚀剂,聚酰亚胺和先进的焊接掩模(ASM)。 金属层包括金属材料,例如铜,铝和金。 碳膜与金属层导电接触,并且碳膜具有足够的导电性,以允许直接在碳膜上电镀连续的金属层(例如铜),而不需要在电镀层下面的无电镀层。 激光钻孔使用波长在约180纳米和约600纳米之间的激光辐射完成。 凹陷可以具有任何横截面形状和深度的任何空间分布。 作为示例,凹陷可以包括盲孔,则盲孔可以具有任何横截面形状,例如圆形或非圆形,矩形通道或其组合。
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公开(公告)号:US6131278A
公开(公告)日:2000-10-17
申请号:US426577
申请日:1999-10-25
IPC分类号: H01L21/56 , H01L23/14 , H01L23/29 , H01L23/31 , H01L23/498 , H01L23/538 , H01L33/62 , H05K3/34
CPC分类号: H01L23/293 , H01L21/563 , H01L23/142 , H01L23/3121 , H01L23/49816 , H01L23/49822 , H01L23/5385 , H01L24/32 , H01L2224/05599 , H01L2224/16225 , H01L2224/27013 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/49175 , H01L2224/73203 , H01L2224/73204 , H01L2224/73265 , H01L2224/83051 , H01L2224/85399 , H01L24/48 , H01L24/49 , H01L24/73 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/0102 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01079 , H01L2924/01082 , H01L2924/10253 , H01L2924/14 , H01L2924/15153 , H01L2924/15165 , H01L2924/15311 , H01L2924/1532 , H01L2924/15787 , H01L2924/181 , H01L33/62 , Y10T29/49121 , Y10T29/49126 , Y10T29/49144
摘要: A package for mounting an integrated circuit chip to a circuit board or the like is provided. The package includes a chip carrier which has a metal substrate including first and second opposed faces. A dielectric coating is provided on at least one of the faces, which preferably is less than about 20 microns in thickness, and preferably has a dielectric constant from about 3.5 to about 4.0. Electrical circuitry is disposed on the dielectric coating, said circuitry including chip mounting pads, connection pads and circuit traces connecting the chip mounting pads to the connection pads. An IC chip is mounted by flip chip or wire bonding or adhesive connection on the face of the metal substrate which has the dielectric coating thereon. In any case, the IC chip is electrically connected to the chip mounting pads either by the solder ball or wire bond connections. Electrical leads extend from the connection pads on the chip carrier and are connected to corresponding pads on a circuit board or the like to provide I/O signals for the IC chip. In certain embodiments, additional heat sinks can be attached to the chip carrier and, also in certain embodiments, chips can be mounted on both sides of the chip carrier to increase the capacity of the chip carrier.
摘要翻译: 提供了用于将集成电路芯片安装到电路板等的封装。 封装包括具有包括第一和第二相对面的金属基板的芯片载体。 在至少一个表面上提供电介质涂层,其优选地厚度小于约20微米,并且优选具有约3.5至约4.0的介电常数。 电路设置在电介质涂层上,所述电路包括将芯片安装焊盘连接到连接焊盘的芯片安装焊盘,连接焊盘和电路迹线。 通过倒装芯片或引线接合或粘合连接将IC芯片安装在金属基板的其上具有电介质涂层的表面上。 在任何情况下,IC芯片通过焊球或引线键连接电连接到芯片安装焊盘。 电引线从芯片载体上的连接焊盘延伸并连接到电路板等上的相应焊盘,以提供IC芯片的I / O信号。 在某些实施例中,额外的散热器可以附接到芯片载体,并且在某些实施例中,芯片可以安装在芯片载体的两侧,以增加芯片载体的容量。
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公开(公告)号:US07737550B2
公开(公告)日:2010-06-15
申请号:US11847716
申请日:2007-08-30
CPC分类号: H05K7/20472 , H01L23/3675 , H01L23/42 , H01L2224/16 , H01L2224/73253 , H01L2924/15311 , H01L2924/16152
摘要: An electronic package device is disclosed including a microelectronic package and a heat sink positioned over the microelectronic package. A thermal interface element is positioned between the microelectronic package and the heat sink. The thermal interface element is elongated and has differing thicknesses along its length to enhance the dissipation of heat.
摘要翻译: 公开了一种包括微电子封装和位于微电子封装上方的散热器的电子封装器件。 热接口元件位于微电子封装和散热器之间。 热界面元件是细长的并且沿其长度具有不同的厚度以增强热耗散。
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公开(公告)号:US06650016B1
公开(公告)日:2003-11-18
申请号:US10262753
申请日:2002-10-01
IPC分类号: H01L2348
CPC分类号: H01L23/13 , H01L21/485 , H01L23/49811 , H01L23/50 , H01L24/16 , H01L24/17 , H01L24/81 , H01L2224/05568 , H01L2224/05573 , H01L2224/13099 , H01L2224/16225 , H01L2224/81191 , H01L2224/81801 , H01L2924/00014 , H01L2924/01004 , H01L2924/01019 , H01L2924/01033 , H01L2924/014 , H01L2924/14 , H01L2924/30105 , H05K1/0256 , H05K3/3452 , H05K2201/09036 , H05K2201/10674 , H01L2224/05599
摘要: In an integrated circuit package employing solder bump technology, a metal layer placed on the surface of a substrate below an array of bonding pads is split and displaced from its axis at selected locations to preserve electrical continuity, but to also lower the height of an insulating solder mask layer at those locations.
摘要翻译: 在采用焊料凸块技术的集成电路封装中,在焊盘阵列下方放置在基板表面上的金属层在选定位置处从其轴线分离和移位,以保持电气连续性,而且降低绝缘体的高度 焊接掩模层在那些位置。
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