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    Low moisture absorptive circuitized substrate, method of making same, electrical assembly utilizing same, and information handling system utilizing same
    4.
    发明授权
    Low moisture absorptive circuitized substrate, method of making same, electrical assembly utilizing same, and information handling system utilizing same 失效
    低吸水性电路化基板，其制造方法，利用其组合的电气组件以及利用其的信息处理系统

    公开(公告)号：US07145221B2

    公开(公告)日：2006-12-05

    申请号：US10920235

    申请日：2004-08-18

    Applicant: Irving Memis ,  Kostas I. Papathomas

    Inventor： Irving Memis ,  Kostas I. Papathomas

    IPC: H01L23/58

    CPC classification number: H01L23/145 ,  H01L21/48 ,  H01L21/50 ,  H01L23/4922 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2924/0002 ,  H05K1/0373 ,  H05K3/4602 ,  H05K2201/0209 ,  H01L2924/00

    Abstract: A circuitized substrate comprising a first layer comprised of a dielectric material including a low moisture absorptive polymer resin in combination with a nodular fluoropolymer web encased within the resin, the resulting dielectric layer formed from this combination not including continuous or semi-continuous fibers as part thereof. The substrate further includes at least one circuitized layer positioned on the dielectric first layer. An electrical assembly and a method of making the substrate are also provided, as is an information handling system (e.g., computer) incorporating the circuitized substrate of the invention as part thereof.

    Abstract translation: 电路化基板，包括由介电材料构成的第一层，该电介质材料包括与包含在该树脂内的结节状氟聚合物纤维网结合的低吸水性聚合物树脂，由该组合形成的所得电介质层不包括连续或半连续纤维作为其一部分 。 衬底还包括位于电介质第一层上的至少一个电路化层。 还提供电气组件和制造基板的方法，如本发明的电路化基板作为其一部分的信息处理系统（例如，计算机）。

    Process for manufacturing a multi-layer circuit board
    5.
    发明授权
    Process for manufacturing a multi-layer circuit board 失效
    制造多层电路板的工艺

    公开(公告)号：US06391210B2

    公开(公告)日：2002-05-21

    申请号：US09901848

    申请日：2001-07-09

    Applicant: Bernd K. Appelt ,  John M. Lauffer ,  Voya R. Markovich ,  Irving Memis ,  David J. Russell

    Inventor： Bernd K. Appelt ,  John M. Lauffer ,  Voya R. Markovich ,  Irving Memis ,  David J. Russell

    IPC: H01B1300

    CPC classification number: H05K3/4652 ,  H05K3/0023 ,  H05K3/0035 ,  H05K2203/0508 ,  H05K2203/0554

    Abstract: A circuit board having a structure including a permanent photoimageable dielectric material suitable for fabrication of vias both by laser ablation, plasma ablation, or mechanical drilling techniques and by photoimaging techniques. A process is also disclosed for the manufacture of a multi-level circuit on a substrate having a first-level circuitry pattern on at least one side. The process comprises applying a permanent photoimageable dielectric over the first-level circuitry pattern; exposing the permanent photoimageable dielectric to radiation; laminating a conductive metal layer to the dielectric; making holes in the conductive metal layer and dielectric by mechanical drilling or by laser or plasma ablation; and making a second-level circuitry pattern and filling the holes with a conductive material to electrically connect the first and second layers of circuitry. A further process is claimed for designing a multi-level circuit board product comprising making a prototype having the above structure in which the holes are manufactured by mechanical drilling or by laser or plasma ablation, evaluating the prototype, and then manufacturing a commercial circuit board having essentially the same structure and materials of construction as the prototype, but wherein the holes are manufactured by photoimaging techniques.

    Abstract translation: 一种电路板，其结构包括适用于通过激光烧蚀，等离子体消融或机械钻孔技术制造通孔的永久可光成像介电材料，以及通过光成像技术。 还公开了一种用于在至少一侧具有第一级电路图案的衬底上制造多电平电路的工艺。 该过程包括在第一级电路图案上施加永久可光成像电介质; 将永久可光成像电介质暴露于辐射; 将导电金属层层叠到电介质上; 通过机械钻孔或通过激光或等离子体消融在导电金属层和电介质中形成孔; 以及制作二级电路图案，并用导电材料填充所述孔，以电连接所述第一和第二层电路。 要求设计多级电路板产品的另一方法包括制造具有上述结构的原型，其中通过机械钻孔或通过激光或等离子体烧蚀制造孔，评估原型，然后制造商业电路板，其具有 基本上与原型相同的结构和结构材料，但是其中孔通过光成像技术制造。

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