公开(公告)号：US11901182B2

公开(公告)日：2024-02-13

申请号：US17363810

申请日：2021-06-30

Applicant: Applied Materials, Inc.

Inventor： Xuebin Li ,  Errol Antonio C. Sanchez ,  Patricia M. Liu

IPC: H01L21/285 ,  H01L21/67 ,  H01L21/677 ,  H01L21/768

CPC classification number: H01L21/28518 ,  H01L21/67213 ,  H01L21/67739 ,  H01L21/76876

Abstract: Embodiments disclosed herein are directed to forming MOSFET devices. In particular, one or more pre-silicide treatments are performed on a substrate prior to the deposition of the metal-silicide layer to improve the density and performance of the metal-silicide layer in the MOSFETs. The metal-silicide formation formed with the pre-silicide treatment(s) can occur before or after the formation of metal gates during MOSFET fabrication.

公开(公告)号：US11081358B2

公开(公告)日：2021-08-03

申请号：US16400260

申请日：2019-05-01

Applicant: Applied Materials, Inc.

Inventor： Xuebin Li ,  Errol Antonio C. Sanchez ,  Patricia M. Liu

IPC: H01L21/285 ,  H01L21/67 ,  H01L21/677 ,  H01L21/768

Abstract: Embodiments disclosed herein are directed to forming MOSFET devices. In particular, one or more pre-silicide treatments are performed on a substrate prior to the deposition of the metal-silicide layer to improve the density and performance of the metal-silicide layer in the MOSFETs. The metal-silicide formation formed with the pre-silicide treatment(s) can occur before or after the formation of metal gates during MOSFET fabrication.

公开(公告)号：US12062579B2

公开(公告)日：2024-08-13

申请号：US17085850

申请日：2020-10-30

Applicant: Applied Materials, Inc.

Inventor： Xuebin Li

IPC: H01L21/8238 ,  C23C16/42 ,  C23C16/50 ,  C23C16/52 ,  H01J37/32 ,  H01L21/285

CPC classification number: H01L21/823814 ,  C23C16/42 ,  C23C16/50 ,  C23C16/52 ,  H01J37/3244 ,  H01J37/32715 ,  H01J37/32834 ,  H01J2237/3321 ,  H01L21/28518

Abstract: A method and apparatus for the formation of a metal-oxide semiconductor FET (MOSFET) device is disclosed herein. The method of formation includes the utilization of a silicon-germanium seed layer deposited over an n-channel metal-oxide semiconductor (NMOS) device and a p-channel metal-oxide semiconductor (PMOS) device. The seed layer may be one seed layer deposited over both the NMOS source/drain regions and the PMOS source/drain regions or two doped seed layers wherein a first doped seed layer is deposited over the PMOS source/drain regions and a second doped seed layer is deposited over the NMOS source/drain regions. The seed layer enables simultaneous formation of a silicide over both the PMOS source/drain regions and the NMOS source/drain regions. The silicide formation consumes the seed layer and forms a silicide layer which varies in composition depending upon the composition of the absorbed seed layer.

公开(公告)号：US11615986B2

公开(公告)日：2023-03-28

申请号：US17477741

申请日：2021-09-17

Applicant: Applied Materials, Inc.

Inventor： Xuebin Li ,  Wei Liu ,  Gaurav Thareja ,  Shashank Sharma ,  Patricia M. Liu ,  Schubert Chu

IPC: H01L21/768 ,  H01L21/285 ,  H01L21/67 ,  H01L29/40 ,  H01L21/02 ,  H01L21/321 ,  H01L23/532 ,  H01L21/8234 ,  H01L21/3205 ,  H01L29/417

Abstract: Methods and apparatuses for processing substrates, such as during metal silicide applications, are provided. In one or more embodiments, a method of processing a substrate includes depositing an epitaxial layer on the substrate, depositing a metal silicide seed layer on the epitaxial layer, and exposing the metal silicide seed layer to a nitridation process to produce a metal silicide nitride layer from at least a portion of the metal silicide seed layer. The method also includes depositing a metal silicide bulk layer on the metal silicide nitride layer and forming or depositing a nitride capping layer on the metal silicide bulk layer, where the nitride capping layer contains a metal nitride, a silicon nitride, a metal silicide nitride, or a combination thereof.

公开(公告)号：US11152221B2

公开(公告)日：2021-10-19

申请号：US16784460

申请日：2020-02-07

Applicant: Applied Materials, Inc.

Inventor： Xuebin Li ,  Wei Liu ,  Gaurav Thareja ,  Shashank Sharma ,  Patricia M. Liu ,  Schubert Chu

IPC: H01L21/321 ,  H01L21/285 ,  H01L21/768 ,  H01L21/67 ,  H01L29/40 ,  H01L21/02 ,  H01L23/532 ,  H01L21/8234 ,  H01L21/3205 ,  H01L29/417

Abstract: Methods and apparatuses for processing substrates, such as during metal silicide applications, are provided. In one or more embodiments, a method of processing a substrate includes depositing an epitaxial layer on the substrate, depositing a metal silicide seed layer on the epitaxial layer, and exposing the metal silicide seed layer to a nitridation process to produce a metal silicide nitride layer from at least a portion of the metal silicide seed layer. The method also includes depositing a metal silicide bulk layer on the metal silicide nitride layer and forming or depositing a nitride capping layer on the metal silicide bulk layer, where the nitride capping layer contains a metal nitride, a silicon nitride, a metal silicide nitride, or a combination thereof.

公开(公告)号：US11037838B2

公开(公告)日：2021-06-15

申请号：US16559227

申请日：2019-09-03

Applicant: Applied Materials, Inc.

Inventor： Xuebin Li ,  Schubert S. Chu ,  Errol Antonio C. Sanchez ,  Patricia M. Liu ,  Gaurav Thareja ,  Raymond Hoiman Hung

IPC: H01L21/8238 ,  H01L21/321 ,  H01L21/02 ,  H01L29/66

Abstract: The systems and methods discussed herein are for a cluster tool that can be used for MOSFET device fabrication, including NMOS and PMOS devices. The cluster tool includes process chambers for pre-cleaning, metal-silicide or metal-germanide film formation, and surface protection operations such as capping and nitridation. The cluster tool can include one or more process chambers configured to form a source and a drain. The devices fabricated in the cluster tool are fabricated to have at least one protective layer formed over the metal-silicide or metal-germanide film to protect the film from contamination during handling and transfer to separate systems.

公开(公告)号：US10930543B2

公开(公告)日：2021-02-23

申请号：US16109945

申请日：2018-08-23

Applicant: Applied Materials, Inc.

Inventor： Anhthu Ngo ,  Zuoming Zhu ,  Balasubramanian Ramachandran ,  Paul Brillhart ,  Edric Tong ,  Anzhong Chang ,  Kin Pong Lo ,  Kartik Shah ,  Schubert S. Chu ,  Zhepeng Cong ,  James Francis Mack ,  Nyi O. Myo ,  Kevin Joseph Bautista ,  Xuebin Li ,  Yi-Chiau Huang ,  Zhiyuan Ye

IPC: H01L21/687 ,  C30B25/12 ,  B05C13/02 ,  B05C13/00 ,  H01L21/673 ,  C23C16/458

Abstract: In one embodiment, a susceptor for thermal processing is provided. The susceptor includes an outer rim surrounding and coupled to an inner dish, the outer rim having an inner edge and an outer edge. The susceptor further includes one or more structures for reducing a contacting surface area between a substrate and the susceptor when the substrate is supported by the susceptor. At least one of the one or more structures is coupled to the inner dish proximate the inner edge of the outer rim.

公开(公告)号：US10062598B2

公开(公告)日：2018-08-28

申请号：US14698793

申请日：2015-04-28

Applicant: Applied Materials, Inc.

Inventor： Anhthu Ngo ,  Zuoming Zhu ,  Balasubramanian Ramachandran ,  Paul Brillhart ,  Edric Tong ,  Anzhong Chang ,  Kin Pong Lo ,  Kartik Shah ,  Schubert S. Chu ,  Zhepeng Cong ,  James Francis Mack ,  Nyi O. Myo ,  Kevin Joseph Bautista ,  Xuebin Li ,  Yi-Chiau Huang ,  Zhiyuan Ye

IPC: H01L21/687 ,  H01L21/673 ,  C30B25/12 ,  B05C13/02 ,  B05C13/00 ,  C23C16/458

CPC classification number: H01L21/68735 ,  B05C13/00 ,  B05C13/02 ,  C23C16/4585 ,  C30B25/12 ,  H01L21/67326 ,  H01L21/6875 ,  H01L21/68785

Abstract: In one embodiment, a susceptor for thermal processing is provided. The susceptor includes an outer rim surrounding and coupled to an inner dish, the outer rim having an inner edge and an outer edge. The susceptor further includes one or more structures for reducing a contacting surface area between a substrate and the susceptor when the substrate is supported by the susceptor. At least one of the one or more structures is coupled to the inner dish proximate the inner edge of the outer rim.

公开(公告)号：US20180158682A1

公开(公告)日：2018-06-07

申请号：US15882939

申请日：2018-01-29

Applicant: Applied Materials, Inc.

Inventor： Abhishek Dube ,  Xuebin Li ,  Yi-Chiau Huang ,  Hua Chung ,  Schubert S. Chu

IPC: H01L21/02

CPC classification number: H01L21/02576 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02636

Abstract: Embodiments of the present disclosure generally relate to methods for forming a doped silicon epitaxial layer on semiconductor devices at increased pressure and reduced temperature. In one embodiment, the method includes heating a substrate disposed within a processing chamber to a temperature of about 550 degrees Celsius to about 800 degrees Celsius, introducing into the processing chamber a silicon source comprising trichlorosilane (TCS), a phosphorus source, and a gas comprising a halogen, and depositing a silicon containing epitaxial layer comprising phosphorus on the substrate, the silicon containing epitaxial layer having a phosphorus concentration of about 1×1021 atoms per cubic centimeter or greater, wherein the silicon containing epitaxial layer is deposited at a chamber pressure of about 150 Torr or greater.

公开(公告)号：US09881790B2

公开(公告)日：2018-01-30

申请号：US15091332

申请日：2016-04-05

Applicant: Applied Materials, Inc.

Inventor： Abhishek Dube ,  Xuebin Li ,  Yi-Chiau Huang ,  Hua Chung ,  Schubert S. Chu

IPC: H01L21/02

CPC classification number: H01L21/02576 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02636

Abstract: Embodiments of the present disclosure generally relate to methods for forming a doped silicon epitaxial layer on semiconductor devices at increased pressure and reduced temperature. In one embodiment, the method includes heating a substrate disposed within a processing chamber to a temperature of about 550 degrees Celsius to about 800 degrees Celsius, introducing into the processing chamber a silicon source comprising trichlorosilane (TCS), a phosphorus source, and a gas comprising a halogen, and depositing a silicon containing epitaxial layer comprising phosphorus on the substrate, the silicon containing epitaxial layer having a phosphorus concentration of about 1×1021 atoms per cubic centimeter or greater, wherein the silicon containing epitaxial layer is deposited at a chamber pressure of about 150 Torr or greater.