公开(公告)号：US20150262828A1

公开(公告)日：2015-09-17

申请号：US14627861

申请日：2015-02-20

Applicant: APPLIED MATERIALS, INC.

Inventor： ADAM BRAND ,  NAOMI YOSHIDA ,  SESHADRI GANGULI ,  DAVID THOMPSON ,  MEI CHANG

IPC: H01L21/285 ,  H01L21/308 ,  H01L21/306 ,  H01L21/8238 ,  H01L29/423 ,  H01L21/3065

CPC classification number: H01L21/823842 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/66606 ,  H01L29/66795 ,  H01L29/7833 ,  H01L29/785 ,  H01L29/78696

Abstract: Methods for forming a multi-threshold voltage device on a substrate are provided herein. In some embodiments, the method of forming a multi-threshold voltage device may include (a) providing a substrate having a first layer disposed thereon, wherein the substrate comprises a first feature and a second feature disposed within the first layer; (b) depositing a blocking layer atop the substrate; (c) selectively removing a portion of the blocking layer from atop the substrate to expose the first feature; (d) selectively depositing a first work function layer atop the first feature; (e) removing a remainder of the blocking layer to expose the second feature; and (f) depositing a second work function layer atop the atop the first work function layer and the second feature.

Abstract translation: 本文提供了在基板上形成多阈值电压装置的方法。 在一些实施例中，形成多阈值电压装置的方法可以包括（a）提供其上设置有第一层的衬底，其中衬底包括设置在第一层内的第一特征和第二特征; （b）在衬底顶上沉积阻挡层; （c）从所述衬底顶部选择性地去除所述阻挡层的一部分以暴露所述第一特征; （d）在所述第一特征顶部选择性地沉积第一功函数层; （e）去除所述阻挡层的剩余部分以暴露所述第二特征; 以及（f）在第一功能层和第二特征顶部之上沉积第二功函数层。

公开(公告)号：US20190057863A1

公开(公告)日：2019-02-21

申请号：US16104352

申请日：2018-08-17

Applicant: APPLIED MATERIALS, INC.

Inventor： YIXIONG YANG ,  PAUL F. MA ,  WEI V. TANG ,  WENYU ZHANG ,  SHIH CHUNG CHEN ,  CHEN HAN LIN ,  CHI-CHOU LIN ,  YI XU ,  YU LEI ,  NAOMI YOSHIDA ,  LIN DONG ,  SIDDARTH KRISHNAN

IPC: H01L21/02 ,  H01L29/40 ,  H01L21/28

Abstract: Methods and apparatus for forming a semiconductor structure, including depositing a doping stack having a first surface atop a high-k dielectric layer, wherein the doping stack includes at least one first metal layer having a first surface, at least one second metal layer comprising a first aluminum dopant and a first surface, wherein the second metal layer is atop the first surface of the first metal layer, and at least one third metal layer atop the first surface of the second metal layer; depositing an anneal layer atop the first surface of the doping stack; annealing the structure to diffuse at least the first aluminum dopant into the high-k dielectric layer; removing the anneal layer; and depositing at least one work function layer atop the first surface of the doping stack.

公开(公告)号：US20160111495A1

公开(公告)日：2016-04-21

申请号：US14885521

申请日：2015-10-16

Applicant: APPLIED MATERIALS, INC.

Inventor： ADAM BRAND ,  BINGXI SUN WOOD ,  NAOMI YOSHIDA ,  LIN DONG ,  SHIYU SUN ,  CHI-NUNG NI ,  YIHWAN KIM

IPC: H01L29/06 ,  H01L29/66 ,  H01L21/306 ,  H01L21/02 ,  H01L21/265 ,  H01L29/20 ,  H01L21/762

CPC classification number: H01L29/0673 ,  H01L21/30612 ,  H01L21/76224 ,  H01L29/20 ,  H01L29/42392 ,  H01L29/66522 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/78696

Abstract: A method of forming a semiconductor device includes: forming a superlattice structure atop the top surface of a substrate, wherein the superlattice structure comprises a plurality of first layers and a corresponding plurality of second layers alternatingly arranged in a plurality of stacked pairs; forming a lateral etch stop layer by epitaxial deposition of a material of the first layer or the second layer of the superlattice structure atop a sidewall of the superlattice structure, or by selectively oxidizing edges of the first layers and second layers of the superlattice structure; subsequently forming a source region adjacent a first end of the superlattice structure and a drain region adjacent a second opposing end of the superlattice structure; and selectively etching the superlattice structure to remove each of the first layers or each of the second layers to form a plurality of voids in the superlattice structure.

Abstract translation: 一种形成半导体器件的方法包括：在衬底的顶表面上方形成超晶格结构，其中超晶格结构包括多个第一层和交替排列成多个堆叠对的相应的多个第二层; 通过在所述超晶格结构的侧壁的外侧沉积超晶格结构的第一层或第二层的材料，或通过选择性地氧化超晶格结构的第一层和第二层的边缘来形成横向蚀刻停止层; 随后形成邻近超晶格结构的第一端的源极区域和与超晶格结构的第二相对端相邻的漏极区域; 并且选择性地蚀刻超晶格结构以去除第一层或第二层中的每一层以在超晶格结构中形成多个空隙。

公开(公告)号：US20150072526A1

公开(公告)日：2015-03-12

申请号：US14484397

申请日：2014-09-12

Applicant: APPLIED MATERIALS, INC.

Inventor： WEI LIU ,  NAOMI YOSHIDA ,  MANDAR BALASAHEB PANDIT

IPC: H01L21/3065 ,  H01L21/02

CPC classification number: H01J37/321 ,  H01L21/3065 ,  H01L21/31122 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/32137 ,  H01L21/32139 ,  H01L21/823828

Abstract: Embodiments of methods for removing carbon-containing films are provided herein. In some embodiments, a method for removing a carbon-containing layer includes providing an ammonia containing process gas to a process chamber having a substrate with a silicon oxide layer disposed atop the substrate and a carbon-containing layer disposed atop the silicon oxide layer disposed in the process chamber; providing RF power to the process chamber to ignite the ammonia containing process gas to form a plasma; and exposing the substrate to NH and/or NH2 radicals and hydrogen radicals formed in the plasma to remove the carbon-containing layer.

Abstract translation: 本文提供了用于除去含碳膜的方法的实施方案。 在一些实施方案中，用于除去含碳层的方法包括向具有衬底的处理室提供含氨工艺气体，所述衬底具有设置在衬底顶部的氧化硅层和设置在设置在衬底上的氧化硅层顶部的含碳层 处理室; 向处理室提供RF功率以点燃含氨工艺气体以形成等离子体; 并将衬底暴露于NH和/或NH 2基团和在等离子体中形成的氢原子以除去含碳层。