公开(公告)号：US20150102396A1

公开(公告)日：2015-04-16

申请号：US14515767

申请日：2014-10-16

Applicant: APPLIED MATERIALS, INC.

Inventor： UDAYAN GANGULY ,  YOSHITAKA YOKOTA ,  JING TANG ,  SUNDERRAJ THIRUPAPULIYUR ,  CHRISTOPHER SEAN OLSEN ,  SHIYU SUN ,  TZE WING POON ,  WEI LIU ,  JOHANES SWENBERG ,  VICKY U. NGUYEN ,  SWAMINATHAR SRINIVASAN ,  JACOB NEWMAN

IPC: H01L29/788 ,  H01L21/67

CPC classification number: H01L29/788 ,  H01L21/67167 ,  H01L21/67207 ,  H01L21/76232 ,  H01L27/11521

Abstract: Semiconductor devices suitable for narrow pitch applications and methods of fabrication thereof are described herein. In some embodiments, a semiconductor device may include a floating gate having a first width proximate a base of the floating gate that is greater than a second width proximate a top of the floating gate. In some embodiments, a method of shaping a material layer may include (a) oxidizing a surface of a material layer to form an oxide layer at an initial rate; (b) terminating formation of the oxide layer when the oxidation rate is about 90% or below of the initial rate; (c) removing at least some of the oxide layer by an etching process; and (d) repeating (a) through (c) until the material layer is formed to a desired shape. In some embodiments, the material layer may be a floating gate of a semiconductor device.

Abstract translation: 适用于窄间距应用的半导体器件及其制造方法在本文中描述。 在一些实施例中，半导体器件可以包括具有接近浮动栅极的基极的第一宽度的浮动栅极，该第一宽度大于靠近浮动栅极顶部的第二宽度。 在一些实施例中，成形材料层的方法可以包括（a）氧化材料层的表面以以初始速率形成氧化物层; （b）当氧化速率为初始速率的约90％或更低时终止氧化物层的形成; （c）通过蚀刻工艺去除至少一些氧化物层; 和（d）重复（a）到（c）直到材料层形成所需的形状。 在一些实施例中，材料层可以是半导体器件的浮置栅极。

公开(公告)号：US20160111495A1

公开(公告)日：2016-04-21

申请号：US14885521

申请日：2015-10-16

Applicant: APPLIED MATERIALS, INC.

Inventor： ADAM BRAND ,  BINGXI SUN WOOD ,  NAOMI YOSHIDA ,  LIN DONG ,  SHIYU SUN ,  CHI-NUNG NI ,  YIHWAN KIM

IPC: H01L29/06 ,  H01L29/66 ,  H01L21/306 ,  H01L21/02 ,  H01L21/265 ,  H01L29/20 ,  H01L21/762

CPC classification number: H01L29/0673 ,  H01L21/30612 ,  H01L21/76224 ,  H01L29/20 ,  H01L29/42392 ,  H01L29/66522 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/78696

Abstract: A method of forming a semiconductor device includes: forming a superlattice structure atop the top surface of a substrate, wherein the superlattice structure comprises a plurality of first layers and a corresponding plurality of second layers alternatingly arranged in a plurality of stacked pairs; forming a lateral etch stop layer by epitaxial deposition of a material of the first layer or the second layer of the superlattice structure atop a sidewall of the superlattice structure, or by selectively oxidizing edges of the first layers and second layers of the superlattice structure; subsequently forming a source region adjacent a first end of the superlattice structure and a drain region adjacent a second opposing end of the superlattice structure; and selectively etching the superlattice structure to remove each of the first layers or each of the second layers to form a plurality of voids in the superlattice structure.

Abstract translation: 一种形成半导体器件的方法包括：在衬底的顶表面上方形成超晶格结构，其中超晶格结构包括多个第一层和交替排列成多个堆叠对的相应的多个第二层; 通过在所述超晶格结构的侧壁的外侧沉积超晶格结构的第一层或第二层的材料，或通过选择性地氧化超晶格结构的第一层和第二层的边缘来形成横向蚀刻停止层; 随后形成邻近超晶格结构的第一端的源极区域和与超晶格结构的第二相对端相邻的漏极区域; 并且选择性地蚀刻超晶格结构以去除第一层或第二层中的每一层以在超晶格结构中形成多个空隙。