知搜-全球专利检索

  1. Login
  2. Sign Up

Search Results

12 records (took 0.015 seconds)

    Molded chip package with anchor structures
    1.
    发明授权
    Molded chip package with anchor structures 有权

    公开(公告)号：US12249519B2

    公开(公告)日：2025-03-11

    申请号：US17843938

    申请日：2022-06-17

    Applicant: ADVANCED MICRO DEVICES, INC.

    Inventor： Priyal Shah ,  Milind S. Bhagavat ,  Brett P. Wilkerson ,  Lei Fu ,  Rahul Agarwal

    IPC: H01L21/56 ,  H01L23/31

    Abstract: Various semiconductor chip packages are disclosed. In one aspect, a semiconductor chip package includes a package substrate that has a first side and a second side opposite to the first side. A semiconductor chip is mounted on the first side. Plural metal anchor structures are coupled to the package substrate and project away from the first side. A molding layer is on the package substrate and at least partially encapsulates the semiconductor chip and the anchor structures. The anchor structures terminate in the molding layer and anchor the molding layer to the package substrate.

    Bond pads for low temperature hybrid bonding
    4.
    发明授权
    Bond pads for low temperature hybrid bonding 有权

    公开(公告)号：US10937755B2

    公开(公告)日：2021-03-02

    申请号：US16023399

    申请日：2018-06-29

    Applicant: ADVANCED MICRO DEVICES, INC.

    Inventor： Priyal Shah ,  Milind S. Bhagavat

    IPC: H01L23/00

    Abstract: Various chip stacks and methods and structures of interconnecting the same are disclosed. In one aspect, an apparatus is provided that includes a first semiconductor chip that has a first glass layer and plural first groups of plural conductor pads in the first glass layer. Each of the plural first groups of conductor pads is configured to bumplessly connect to a corresponding second group of plural conductor pads of a second semiconductor chip to make up a first interconnect of a plurality interconnects that connect the first semiconductor chip to the second semiconductor chip. The first glass layer is configured to bond to a second glass layer of the second semiconductor chip.

    Semiconductor package with annular package lid structure
    5.
    发明授权
    Semiconductor package with annular package lid structure 有权

    公开(公告)号：US12278150B2

    公开(公告)日：2025-04-15

    申请号：US17490943

    申请日：2021-09-30

    Applicant: ADVANCED MICRO DEVICES, INC.

    Inventor： Priyal Shah ,  Brett P. Wilkerson ,  Raja Swaminathan

    IPC: H01L23/053 ,  H01L21/48 ,  H01L21/52 ,  H01L23/367 ,  H01L23/498

    Abstract: A semiconductor package includes a substrate having opposing first and second surfaces as well as a semiconductor chip component disposed at the second surface and having third and fourth opposing surfaces. A package lid structure is affixed to the second surface of the substrate and the fourth surface of the semiconductor chip component, and has a planar component overlying the semiconductor chip component and having a fifth surface facing the fourth surface and an opposing sixth surface. The planar component includes an aperture extending between the fifth surface and the sixth surface so as to expose at least a portion of the fourth surface of the semiconductor chip component. A thermal exchange structure can be mounted on the package lid structure to form a thermal extraction pathway with the semiconductor die component via the aperture, either directly or via an interposing thermally conductive plate.

    Molded chip package with anchor structures
    6.
    发明授权
    Molded chip package with anchor structures 有权

    公开(公告)号：US11367628B2

    公开(公告)日：2022-06-21

    申请号：US16513450

    申请日：2019-07-16

    Applicant: ADVANCED MICRO DEVICES, INC.

    Inventor： Priyal Shah ,  Milind S. Bhagavat ,  Brett P. Wilkerson ,  Lei Fu ,  Rahul Agarwal

    IPC: H01L21/56 ,  H01L23/31

    Abstract: Various semiconductor chip packages are disclosed. In one aspect, a semiconductor chip package includes a package substrate that has a first side and a second side opposite to the first side. A semiconductor chip is mounted on the first side. Plural metal anchor structures are coupled to the package substrate and project away from the first side. A molding layer is on the package substrate and at least partially encapsulates the semiconductor chip and the anchor structures. The anchor structures terminate in the molding layer and anchor the molding layer to the package substrate.

    Semiconductor chip with reduced pitch conductive pillars
    10.
    发明授权
    Semiconductor chip with reduced pitch conductive pillars 有权

    公开(公告)号：US10943880B2

    公开(公告)日：2021-03-09

    申请号：US16414389

    申请日：2019-05-16

    Applicant: ADVANCED MICRO DEVICES, INC.

    Inventor： Priyal Shah ,  Milind S. Bhagavat ,  Lei Fu

    IPC: H01L23/00

    Abstract: Various semiconductor chips and packages are disclosed. In one aspect, an apparatus is provided that includes a semiconductor chip that has a side, and plural conductive pillars on the side. Each of the conductive pillars includes a pillar portion that has an exposed shoulder facing away from the semiconductor chip. The shoulder provides a wetting surface to attract melted solder. The pillar portion has a first lateral dimension at the shoulder. A solder cap is positioned on the pillar portion. The solder cap has a second lateral dimension smaller than the first lateral dimension.

Patent Agency Ranking