公开(公告)号：US20250038104A1

公开(公告)日：2025-01-30

申请号：US18759139

申请日：2024-06-28

Applicant: Adeia Semiconductor Bonding Technologies Inc.

Inventor： Rajesh Katkar ,  Belgacem Haba

IPC: H01L23/522 ,  H01L23/00 ,  H01L23/528 ,  H01L25/065 ,  H01L25/16 ,  H01L29/94

Abstract: A component comprises a substrate comprising a first side and a second side opposite to the first side. A first dielectric layer is formed on the first side, and a plurality of electrically conductive pads extend through the first dielectric layer. A second dielectric layer is formed on the second side, and a plurality of electrically conductive pads extend through the second dielectric layer. A plurality of capacitors are each formed in an opening that extends at least partially from the first side towards the second side of the substrate. Each of the capacitors comprises at least three electrodes. At least one of the plurality of capacitors is coupled on the first side to an electrically conductive pad of the first dielectric layer and is coupled on the second side to an electrically conductive pad of the second dielectric layer.

公开(公告)号：US12191233B2

公开(公告)日：2025-01-07

申请号：US17876376

申请日：2022-07-28

Applicant: Adeia Semiconductor Bonding Technologies Inc.

Inventor： Belgacem Haba ,  Thomas Workman ,  Cyprian Emeka Uzoh ,  Guilian Gao ,  Rajesh Katkar

IPC: H01L23/34 ,  H01L23/00 ,  H01L23/32 ,  H01L23/467 ,  H01L23/473 ,  H01L25/065 ,  H01L25/10 ,  H01L25/18

Abstract: Embodiments herein provide for fluidic cooling assemblies embedded within a device package and related manufacturing methods. In one embodiment, the cooling assembly includes a cold plate body attached to a singulated device and a manifold lid attached to the cold plate body. The cold plate body has a first side adjacent to the singulated device and an opposite second side, and the manifold lid is attached to the second side. In some embodiments, the first side of the cold plate body and the backside of the singulated device each comprise a dielectric material surface, the cold plate body is attached to the singulated device by direct dielectric bonds formed between the dielectric material surfaces, the cold plate body, and the manifold lid define one or more cavities, and the one or more cavities form at least a portion of a fluid flow path from an inlet to an outlet of the manifold lid.

公开(公告)号：US20250004197A1

公开(公告)日：2025-01-02

申请号：US18745266

申请日：2024-06-17

Applicant: Adeia Semiconductor Bonding Technologies Inc.

Inventor： Belgacem Haba ,  Rajesh Katkar ,  Mani Hossein-Zadeh

IPC: G02B6/12

Abstract: A directly bonded optical component comprising one or more optical channels is disclosed. The directly bonded optical component can include at least a first optical element and a second optical element directly bonded to the first optical element without an intervening adhesive. The optical component can include a first optical channel through at least a portion of the first optical element, the first optical channel extending between a first port at a first side of the optical component and a second port at a second side of the optical component. A second optical channel or waveguide can extend through at least a portion of the second optical element from a third port at the first side of the optical component to a fourth port. The first and third ports can be separated by a first distance and the second and fourth parts can be separated a second distance along an exterior surface of the optical component. The first distance can be different from the second distance.

公开(公告)号：US20240186268A1

公开(公告)日：2024-06-06

申请号：US18523702

申请日：2023-11-29

Applicant: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.

Inventor： Cyprian Emeka Uzoh ,  Rajesh Katkar

IPC: H01L23/00 ,  H01L23/053 ,  H01L23/31

CPC classification number: H01L23/562 ,  H01L23/053 ,  H01L23/3157 ,  H01L24/08 ,  H01L2224/08225

Abstract: A bonded structure is disclosed. The bonded structure can include a carrier including a surface having a first region and a second region, an integrated device die directly bonded to the first region of the carrier, and a frame structure that is disposed on the second region. The frame structure can be a continuous frame structure. The frame structure can have a first elongate frame element and a second elongate frame element that are positioned between the integrated device die and the second section. At least a portion of the second region between the first frame element and the second frame element can be free from the frame structure.

公开(公告)号：US20240162102A1

公开(公告)日：2024-05-16

申请号：US18545120

申请日：2023-12-19

Applicant: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.

Inventor： Rajesh Katkar ,  Liang Wang

IPC: H01L23/26 ,  B81B7/00 ,  B81C3/00 ,  H01L21/322 ,  H01L23/00 ,  H01L23/04 ,  H01L23/10

CPC classification number: H01L23/26 ,  B81B7/0038 ,  B81C3/001 ,  H01L21/3221 ,  H01L23/04 ,  H01L23/10 ,  H01L24/03 ,  H01L24/09

Abstract: A bonded structure is disclosed. The bonded structure can include a first element that has a first bonding surface. The bonded structure can further include a second element that has a second bonding surface. The first and second bonding surfaces are bonded to one another along a bonding interface. The bonded structure can also include an integrated device that is coupled to or formed with the first element or the second element. The bonded structure can further include a channel that is disposed along the bonding interface around the integrated device to define an effectively closed profile The bonded structure can also include a getter material that is disposed in the channel. The getter material is configured to reduce the diffusion of gas into an interior region of the bonded structure.

公开(公告)号：US20240136333A1

公开(公告)日：2024-04-25

申请号：US18535375

申请日：2023-12-11

Applicant: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.

Inventor： Rajesh Katkar ,  Belgacem Haba

IPC: H01L25/065 ,  H01L23/00

CPC classification number: H01L25/0657 ,  H01L24/06 ,  H01L24/26 ,  H01L24/93

Abstract: An element that is configured to bond to another element is disclosed. A first element that can include a first plurality of contact pads on a first surface. The first plurality of contact pads includes a first contact pad and a second contact pad that are spaced apart from one another. The first and second contact pads are electrically connected to one another for redundancy. The first element can be prepared for direct bonding. The first element can be bonded to a second element to form a bonded structure. The second element has a second plurality of contact pads on a second surface. At least one of the second plurality of contact pads is bonded and electrically connected to at least one of the first plurality of contact pads.

公开(公告)号：US11955445B2

公开(公告)日：2024-04-09

申请号：US17836840

申请日：2022-06-09

Applicant: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.

Inventor： Guilian Gao ,  Bongsub Lee ,  Gaius Gillman Fountain, Jr. ,  Cyprian Emeka Uzoh ,  Laura Wills Mirkarimi ,  Belgacem Haba ,  Rajesh Katkar

IPC: H01L23/00 ,  H01L21/768 ,  H01L23/48 ,  H01L25/00 ,  H01L25/065

CPC classification number: H01L24/08 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/09 ,  H01L24/80 ,  H01L25/0657 ,  H01L25/50 ,  H01L24/94 ,  H01L2224/05147 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/08146 ,  H01L2224/80896

Abstract: Representative techniques and devices including process steps may be employed to mitigate the potential for delamination of bonded microelectronic substrates due to metal expansion at a bonding interface. For example, a metal pad having a larger diameter or surface area (e.g., oversized for the application) may be used when a contact pad is positioned over a TSV in one or both substrates.

公开(公告)号：US20240103274A1

公开(公告)日：2024-03-28

申请号：US18360193

申请日：2023-07-27

Applicant: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.

Inventor： Rajesh Katkar ,  Belgacem Haba

IPC: G02B27/01 ,  G02B27/10 ,  G02B27/14 ,  H01L25/075

CPC classification number: G02B27/0172 ,  G02B27/102 ,  G02B27/141 ,  H01L25/0753 ,  G02B2027/0178

Abstract: A bonded optical device is disclosed. The bonded optical device can include a first optical element, a second optical element, and an optical pathway. The first optical element has a first array of optical emitters configured to emit light of a first color. The first optical element is bonded to at least one processor element, the at least one processor element including active circuitry configured to control operation of the first optical element. The second optical element has a second array of optical emitters configured to emit light of a second color different from the first color. The second optical element is bonded to the at least one processor element. The optical pathway is optically coupled with the first and second optical elements. The optical pathway is configured to transmit a superposition of light from the first and second optical emitters to an optical output to be viewed by users.

公开(公告)号：US20240079351A1

公开(公告)日：2024-03-07

申请号：US18346396

申请日：2023-07-03

Applicant: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.

Inventor： Javier A. DeLaCruz ,  Rajesh Katkar

IPC: H01L23/00

CPC classification number: H01L23/573 ,  H01L24/05 ,  H01L24/48 ,  H01L24/83 ,  H01L24/94 ,  H01L2224/04042 ,  H01L2224/83896

Abstract: A bonded structure is disclosed. The bonded structure can include a semiconductor element comprising active circuitry. The bonded structure can include an obstructive element bonded to the semiconductor element along a bond interface, the obstructive element including an obstructive material disposed over the active circuitry, the obstructive material configured to obstruct external access to the active circuitry. The bonded element can include an artifact structure indicative of a wafer-level bond in which the semiconductor element and the obstructive element formed part of respective wafers directly bonded prior to singulation.

公开(公告)号：US11894326B2

公开(公告)日：2024-02-06

申请号：US17370576

申请日：2021-07-08

Applicant: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.

Inventor： Rajesh Katkar ,  Cyprian Emeka Uzoh

IPC: H01L23/00 ,  H01L25/00

CPC classification number: H01L24/05 ,  H01L24/03 ,  H01L24/08 ,  H01L24/80 ,  H01L25/50 ,  H01L2224/0347 ,  H01L2224/0362 ,  H01L2224/0384 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/03616 ,  H01L2224/03845 ,  H01L2224/05013 ,  H01L2224/05015 ,  H01L2224/05026 ,  H01L2224/05076 ,  H01L2224/05082 ,  H01L2224/05105 ,  H01L2224/05109 ,  H01L2224/05111 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05181 ,  H01L2224/05551 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/05576 ,  H01L2224/05578 ,  H01L2224/05605 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/08145 ,  H01L2224/08146 ,  H01L2224/80375 ,  H01L2224/80895 ,  H01L2224/05647 ,  H01L2924/00014 ,  H01L2224/05655 ,  H01L2924/00014 ,  H01L2224/05611 ,  H01L2924/00014 ,  H01L2224/05609 ,  H01L2924/00014 ,  H01L2224/05605 ,  H01L2924/00014 ,  H01L2224/05644 ,  H01L2924/00014 ,  H01L2224/05639 ,  H01L2924/00014

Abstract: A first conductive material having a first hardness is disposed within a recess or opening of a microelectronic component, in a first preselected pattern, and forms a first portion of an interconnect structure. A second conductive material having a second hardness different from the first hardness is disposed within the recess or opening in a second preselected pattern and forms a second portion of the interconnect structure.