公开(公告)号：US20240162178A1

公开(公告)日：2024-05-16

申请号：US18422795

申请日：2024-01-25

Applicant: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.

Inventor： Javier A. DeLaCruz ,  Belgacem Haba ,  Jung Ko

IPC: H01L23/00 ,  G01R31/27 ,  G01R31/28 ,  H01L25/065

CPC classification number: H01L24/06 ,  G01R31/275 ,  G01R31/2856 ,  H01L24/08 ,  H01L25/0657

Abstract: A bonded structure is disclosed. The bonded structure can include a first element that has a first plurality of contact pads. The first plurality of contact pads includes a first contact pad and a second redundant contact pad. The bonded structure can also include a second element directly bonded to the first element without an intervening adhesive. The second element has a second plurality of contact pads. The second plurality of contact pads includes a third contact pad and a fourth redundant contact pad. The first contact pad is configured to connect to the third contact pad. The second contact pad is configured to connect to the fourth contact pad. The bonded structure can include circuitry that has a first state in which an electrical signal is transferred to the first contact pad and a second state in which the electrical signal is transferred to the second contact pad.

公开(公告)号：US20240079351A1

公开(公告)日：2024-03-07

申请号：US18346396

申请日：2023-07-03

Applicant: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.

Inventor： Javier A. DeLaCruz ,  Rajesh Katkar

IPC: H01L23/00

CPC classification number: H01L23/573 ,  H01L24/05 ,  H01L24/48 ,  H01L24/83 ,  H01L24/94 ,  H01L2224/04042 ,  H01L2224/83896

Abstract: A bonded structure is disclosed. The bonded structure can include a semiconductor element comprising active circuitry. The bonded structure can include an obstructive element bonded to the semiconductor element along a bond interface, the obstructive element including an obstructive material disposed over the active circuitry, the obstructive material configured to obstruct external access to the active circuitry. The bonded element can include an artifact structure indicative of a wafer-level bond in which the semiconductor element and the obstructive element formed part of respective wafers directly bonded prior to singulation.

公开(公告)号：US11817409B2

公开(公告)日：2023-11-14

申请号：US17563506

申请日：2021-12-28

Applicant: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.

Inventor： Belgacem Haba ,  Rajesh Katkar ,  Ilyas Mohammed ,  Javier A. DeLaCruz

IPC: H01L23/00 ,  H01L21/78

CPC classification number: H01L24/08 ,  H01L21/78 ,  H01L24/80 ,  H01L24/94 ,  H01L2224/08146 ,  H01L2224/80006 ,  H01L2224/80895 ,  H01L2224/80896

Abstract: A bonded structure can include a first reconstituted element comprising a first element and having a first side comprising a first bonding surface and a second side opposite the first side. The first reconstituted element can comprise a first protective material disposed about a first sidewall surface of the first element. The bonded structure can comprise a second reconstituted element comprising a second element and having a first side comprising a second bonding surface and a second side opposite the first side. The first reconstituted element can comprise a second protective material disposed about a second sidewall surface of the second element. The second bonding surface of the first side of the second reconstituted element can be directly bonded to the first bonding surface of the first side of the first reconstituted element without an intervening adhesive along a bonding interface.

公开(公告)号：US11670615B2

公开(公告)日：2023-06-06

申请号：US17131588

申请日：2020-12-22

Applicant: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.

Inventor： Liang Wang ,  Rajesh Katkar ,  Javier A. DeLaCruz ,  Arkalgud R. Sitaram

IPC: H01L23/00 ,  H01L23/498 ,  H01L23/532 ,  H01L23/528 ,  H01L23/10 ,  B81C1/00 ,  H05K1/11

CPC classification number: H01L24/29 ,  B81C1/00269 ,  B81C1/00293 ,  H01L23/10 ,  H01L23/49838 ,  H01L23/528 ,  H01L23/53228 ,  H01L23/53242 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  B81B2207/012 ,  B81C2203/035 ,  H01L23/562 ,  H01L24/80 ,  H01L2224/05551 ,  H01L2224/05552 ,  H01L2224/05555 ,  H01L2224/05571 ,  H01L2224/05647 ,  H01L2224/05686 ,  H01L2224/06135 ,  H01L2224/06155 ,  H01L2224/06165 ,  H01L2224/06505 ,  H01L2224/08121 ,  H01L2224/08237 ,  H01L2224/29019 ,  H01L2224/8001 ,  H01L2224/80047 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/80948 ,  H05K1/111 ,  H01L2224/05552 ,  H01L2924/00012 ,  H01L2224/05647 ,  H01L2924/00014 ,  H01L2224/05686 ,  H01L2924/053

Abstract: A bonded structure can include a first element having a first conductive interface feature and a second element having a second conductive interface feature. An integrated device can be coupled to or formed with the first element or the second element. The first conductive interface feature can be directly bonded to the second conductive interface feature to define an interface structure. The interface structure can be disposed about the integrated device in an at least partially annular profile to connect the first and second elements.

公开(公告)号：US12174246B2

公开(公告)日：2024-12-24

申请号：US17805817

申请日：2022-06-07

Applicant: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.

Inventor： Javier A. DeLaCruz ,  Belgacem Haba ,  Guy Regev

IPC: H01L23/00 ,  G01R31/28 ,  G01R31/70

Abstract: A bonded structure is disclosed. The bonded structure can include a first semiconductor element having a first front side and a first back side opposite the first front side. The bonded structure can include a second semiconductor element having a second front side and a second back side opposite the second front side, the first front side of the first semiconductor element directly bonded to the second front side of the second semiconductor element along a bond interface without an adhesive. The bonded structure can include security circuitry extending across the bond interface, the security circuitry electrically connected to the first and second semiconductor elements.

公开(公告)号：US12176303B2

公开(公告)日：2024-12-24

申请号：US18346396

申请日：2023-07-03

Applicant: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.

Inventor： Javier A. DeLaCruz ,  Rajesh Katkar

IPC: H01L23/00

Abstract: A bonded structure is disclosed. The bonded structure can include a semiconductor element comprising active circuitry. The bonded structure can include an obstructive element bonded to the semiconductor element along a bond interface, the obstructive element including an obstructive material disposed over the active circuitry, the obstructive material configured to obstruct external access to the active circuitry. The bonded element can include an artifact structure indicative of a wafer-level bond in which the semiconductor element and the obstructive element formed part of respective wafers directly bonded prior to singulation.

公开(公告)号：US20240387439A1

公开(公告)日：2024-11-21

申请号：US18784724

申请日：2024-07-25

Applicant: Adeia Semiconductor Bonding Technologies Inc.

Inventor： Belgacem Haba ,  Laura Wills Mirkarimi ,  Javier A. DeLaCruz ,  Rajesh Katkar ,  Cyprian Emeka Uzoh ,  Guilian Gao ,  Thomas Workman

IPC: H01L23/00 ,  H01L23/31

Abstract: A bonded structure can comprise a first element and a second element. The first element has a first dielectric layer including a first bonding surface and at least one first side surface of the first element. The second element has a second dielectric layer including a second bonding surface and at least one second side surface of the second element. The second bonding surface of the second element is directly bonded to the first bonding surface of the first element without an adhesive.

公开(公告)号：US11967575B2

公开(公告)日：2024-04-23

申请号：US17681019

申请日：2022-02-25

Applicant: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.

Inventor： Guilian Gao ,  Javier A. DeLaCruz ,  Shaowu Huang ,  Liang Wang ,  Gaius Gillman Fountain, Jr. ,  Rajesh Katkar ,  Cyprian Emeka Uzoh

IPC: H01L23/00

CPC classification number: H01L24/08 ,  H01L24/05 ,  H01L24/06 ,  H01L24/74 ,  H01L24/80 ,  H01L24/89 ,  H01L2224/05557 ,  H01L2224/06131 ,  H01L2224/06177 ,  H01L2224/08147 ,  H01L2224/80007 ,  H01L2224/80011 ,  H01L2224/80031 ,  H01L2224/80047 ,  H01L2224/8013 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2924/3512

Abstract: Structures and techniques provide bond enhancement in microelectronics by trapping contaminants and byproducts during bonding processes, and arresting cracks. Example bonding surfaces are provided with recesses, sinks, traps, or cavities to capture small particles and gaseous byproducts of bonding that would otherwise create detrimental voids between microscale surfaces being joined, and to arrest cracks. Such random voids would compromise bond integrity and electrical conductivity of interconnects being bonded. In example systems, a predesigned recess space or predesigned pattern of recesses placed in the bonding interface captures particles and gases, reducing the formation of random voids, thereby improving and protecting the bond as it forms. The recess space or pattern of recesses may be placed where particles collect on the bonding surface, through example methods of determining where mobilized particles move during bond wave propagation. A recess may be repeated in a stepped reticule pattern at the wafer level, for example, or placed by an aligner or alignment process.

公开(公告)号：US20240128186A1

公开(公告)日：2024-04-18

申请号：US18394558

申请日：2023-12-22

Applicant: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.

Inventor： Belgacem Haba ,  Javier A. DeLaCruz

IPC: H01L23/522 ,  H01L23/00 ,  H01L23/528 ,  H01L23/538 ,  H01L25/16

CPC classification number: H01L23/5223 ,  H01L23/5226 ,  H01L23/5286 ,  H01L23/5383 ,  H01L23/5389 ,  H01L24/17 ,  H01L25/16 ,  H01L28/60 ,  H01L2924/1205

Abstract: In various embodiments, a passive electronic component is disclosed. The passive electronic component can have a first surface and a second surface opposite the first surface. The passive electronic component can include a nonconductive material and a capacitor embedded within the nonconductive material. The capacitor can have a first electrode, a second electrode, and a dielectric material disposed between the first and second electrodes. The first electrode can comprise a first conductive layer and a plurality of conductive fibers extending from and electrically connected to the first conductive layer. A first conductive via can extend through the passive electronic component from the first surface to the second surface, with the first conductive via electrically connected to the first electrode.

公开(公告)号：US20240096823A1

公开(公告)日：2024-03-21

申请号：US18520337

申请日：2023-11-27

Applicant: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.

Inventor： Javier A. DeLaCruz ,  Belgacem Haba ,  Rajesh Katkar

IPC: H01L23/00 ,  H01L21/66 ,  H01L23/528

CPC classification number: H01L23/573 ,  H01L22/34 ,  H01L23/528 ,  H01L23/562 ,  H01L24/05 ,  H01L24/08 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/49 ,  H01L2224/08237 ,  H01L2224/29082 ,  H01L2224/29187 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48225 ,  H01L2224/49171 ,  H01L2224/73215

Abstract: A bonded structure is disclosed. The bonded structure can include a semiconductor element comprising active circuitry. The bonded structure can include a protective element directly bonded to the semiconductor element without an adhesive along a bonding interface. The protective element can include an obstructive material disposed over at least a portion of the active circuitry. The obstructive material can be configured to obstruct external access to the active circuitry. The bonded structure can include a disruption structure configured to disrupt functionality of the at least a portion of the active circuitry upon debonding of the protective element from the semiconductor element.