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公开(公告)号：US11955445B2
公开(公告)日：2024-04-09
申请号：US17836840
申请日：2022-06-09
Inventor： Guilian Gao , Bongsub Lee , Gaius Gillman Fountain, Jr. , Cyprian Emeka Uzoh , Laura Wills Mirkarimi , Belgacem Haba , Rajesh Katkar
IPC: H01L23/00 , H01L21/768 , H01L23/48 , H01L25/00 , H01L25/065
CPC classification number: H01L24/08 , H01L21/76898 , H01L23/481 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/09 , H01L24/80 , H01L25/0657 , H01L25/50 , H01L24/94 , H01L2224/05147 , H01L2224/05181 , H01L2224/05184 , H01L2224/08146 , H01L2224/80896
Abstract: Representative techniques and devices including process steps may be employed to mitigate the potential for delamination of bonded microelectronic substrates due to metal expansion at a bonding interface. For example, a metal pad having a larger diameter or surface area (e.g., oversized for the application) may be used when a contact pad is positioned over a TSV in one or both substrates.
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公开(公告)号：US20240249985A1
公开(公告)日：2024-07-25
申请号：US18628589
申请日：2024-04-05
Inventor： Rajesh Katkar , Laura Wills Mirkarimi , Bongsub Lee , Gaius Gillman Fountain, JR. , Cyprian Emeka Uzoh
IPC: H01L23/10 , H01L21/768 , H01L23/00
CPC classification number: H01L23/10 , H01L21/76807 , H01L21/76816 , H01L24/08 , H01L2924/01029
Abstract: A bonded structure is disclosed. The bonded structure includes a first element and a second element that is bonded to the first element along a bonding interface. The bonding interface has an elongate conductive interface feature and a nonconductive interface feature. The bonded structure also includes an integrated device that is coupled to or formed with the first element or the second element. The elongate conductive interface feature has a recess through a portion of a thickness of the elongate conductive interface feature. A portion of the nonconductive interface feature is disposed in the recess.
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公开(公告)号：US11728313B2
公开(公告)日：2023-08-15
申请号：US17246845
申请日：2021-05-03
Inventor： Bongsub Lee , Guilian Gao
IPC: H01L25/065 , H01L23/00 , H01L23/48 , H01L23/482 , H01L21/768 , H01L23/522
CPC classification number: H01L25/0657 , H01L21/76843 , H01L21/76895 , H01L23/481 , H01L23/4824 , H01L23/5226 , H01L24/09 , H01L24/32 , H01L24/80 , H01L24/83 , H01L2224/08145 , H01L2224/80895 , H01L2224/80896 , H01L2225/06524 , H01L2225/06544
Abstract: Representative techniques and devices including process steps may be employed to mitigate the potential for delamination of bonded microelectronic substrates due to metal expansion at a bonding interface. For example, a metal pad may be disposed at a bonding surface of at least one of the microelectronic substrates, where the contact pad is positioned offset relative to a TSV in the substrate and electrically coupled to the TSV.
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公开(公告)号：US20240194625A1
公开(公告)日：2024-06-13
申请号：US18582312
申请日：2024-02-20
Inventor： Guilian Gao , Bongsub Lee , Gaius Gillman Fountain, JR. , Cyprian Emeka Uzoh , Laura Wills Mirkarimi , Belgacem Haba , Rajesh Katkar
IPC: H01L23/00 , H01L21/768 , H01L23/48 , H01L25/00 , H01L25/065
CPC classification number: H01L24/08 , H01L21/76898 , H01L23/481 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/09 , H01L24/80 , H01L25/0657 , H01L25/50 , H01L24/94 , H01L2224/05147 , H01L2224/05181 , H01L2224/05184 , H01L2224/08146 , H01L2224/80896
Abstract: Representative techniques and devices including process steps may be employed to mitigate the potential for delamination of bonded microelectronic substrates due to metal expansion at a bonding interface. For example, a metal pad having a larger diameter or surface area (e.g., oversized for the application) may be used when a contact pad is positioned over a TSV in one or both substrates.
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公开(公告)号：US11955393B2
公开(公告)日：2024-04-09
申请号：US17315170
申请日：2021-05-07
Inventor： Rajesh Katkar , Laura Wills Mirkarimi , Bongsub Lee , Gaius Gillman Fountain, Jr. , Cyprian Emeka Uzoh
IPC: H01L23/10 , H01L21/768 , H01L23/00
CPC classification number: H01L23/10 , H01L21/76807 , H01L21/76816 , H01L24/08 , H01L2924/01029
Abstract: A bonded structure is disclosed. The bonded structure includes a first element and a second element that is bonded to the first element along a bonding interface. The bonding interface has an elongate conductive interface feature and a nonconductive interface feature. The bonded structure also includes an integrated device that is coupled to or formed with the first element or the second element. The elongate conductive interface feature has a recess through a portion of a thickness of the elongate conductive interface feature. A portion of the nonconductive interface feature is disposed in the recess.
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Patent Agency Ranking
公开(公告)号：US11749645B2
公开(公告)日：2023-09-05
申请号：US16439360
申请日：2019-06-12
Inventor： Guilian Gao , Bongsub Lee , Gaius Gillman Fountain, Jr. , Cyprian Emeka Uzoh , Belgacem Haba , Laura Wills Mirkarimi , Rajesh Katkar
IPC: H01L25/065 , H01L21/768 , H01L23/48 , H01L23/482 , H01L23/522 , H01L23/00
CPC classification number: H01L25/0657 , H01L21/76843 , H01L21/76895 , H01L21/76898 , H01L23/481 , H01L23/4824 , H01L23/5226 , H01L24/09 , H01L24/32 , H01L24/80 , H01L24/83 , H01L2224/08145 , H01L2224/80895 , H01L2224/80896 , H01L2225/06524 , H01L2225/06544
Abstract: Representative techniques and devices including process steps may be employed to mitigate the potential for delamination of bonded microelectronic substrates due to metal expansion at a bonding interface. For example, a through-silicon via (TSV) may be disposed through at least one of the microelectronic substrates. The TSV is exposed at the bonding interface of the substrate and functions as a contact surface for direct bonding.
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公开(公告)号：US12205926B2
公开(公告)日：2025-01-21
申请号：US18451674
申请日：2023-08-17
Inventor： Guilian Gao , Bongsub Lee , Gaius Gillman Fountain, Jr. , Cyprian Emeka Uzoh , Belgacem Haba , Laura Wills Mirkarimi , Rajesh Katkar
IPC: H01L25/065 , H01L21/768 , H01L23/00 , H01L23/48 , H01L23/482 , H01L23/522 , H01L21/60 , H01L25/00
Abstract: Representative techniques and devices including process steps may be employed to mitigate the potential for delamination of bonded microelectronic substrates due to metal expansion at a bonding interface. For example, a through-silicon via (TSV) may be disposed through at least one of the microelectronic substrates. The TSV is exposed at the bonding interface of the substrate and functions as a contact surface for direct bonding.
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8.发明公开公开(公告)号：US20240217210A1
公开(公告)日：2024-07-04
申请号：US18148160
申请日：2022-12-29
Inventor： Oliver Zhao , Bongsub Lee , Cyprian Emeka Uzoh
CPC classification number: B32B15/016 , B32B3/266 , B32B3/30 , B32B15/017 , B32B15/20 , B32B2250/02 , B32B2307/202 , B32B2307/206 , B32B2311/22 , B32B2311/24
Abstract: An element, bonded structure that includes the element, and methods forming the same are disclosed. A bonded structure can include a first element having a first nonconductive field region and a first conductive feature, and a second element having a second nonconductive field region and a second conductive feature. The second element is directly hybrid bonded to the first element such that the first and second nonconductive field regions are directly bonded to one another along a bond interface and the first and second conductive features are directly bonded to one another. The first conductive feature can include a perforated oxide layer. 1 at. % to 20 at. % of the first aluminum feature can be aluminum oxide.
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公开(公告)号：US20240088101A1
公开(公告)日：2024-03-14
申请号：US18451674
申请日：2023-08-17
Inventor： Guilian Gao , Bongsub Lee , Gaius Gillman Fountain, JR. , Cyprian Emeka Uzoh , Belgacem Haba , Laura Wills Mirkarimi , Rajesh Katkar
IPC: H01L25/065 , H01L21/768 , H01L23/00 , H01L23/48 , H01L23/482 , H01L23/522
CPC classification number: H01L25/0657 , H01L21/76843 , H01L21/76895 , H01L21/76898 , H01L23/481 , H01L23/4824 , H01L23/5226 , H01L24/09 , H01L24/32 , H01L24/80 , H01L24/83 , H01L2224/08145 , H01L2224/80895 , H01L2224/80896 , H01L2225/06524 , H01L2225/06544
Abstract: Representative techniques and devices including process steps may be employed to mitigate the potential for delamination of bonded microelectronic substrates due to metal expansion at a bonding interface. For example, a through-silicon via (TSV) may be disposed through at least one of the microelectronic substrates. The TSV is exposed at the bonding interface of the substrate and functions as a contact surface for direct bonding.
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公开(公告)号：US20240006383A1
公开(公告)日：2024-01-04
申请号：US18346403
申请日：2023-07-03
Inventor： Bongsub Lee , Guilian Gao
IPC: H01L25/065 , H01L23/00 , H01L23/48 , H01L23/482 , H01L21/768 , H01L23/522
CPC classification number: H01L25/0657 , H01L24/32 , H01L24/83 , H01L23/481 , H01L23/4824 , H01L21/76843 , H01L21/76895 , H01L23/5226 , H01L24/09 , H01L24/80 , H01L21/76898 , H01L2225/06524 , H01L2225/06544 , H01L2224/08145 , H01L2224/80895 , H01L2224/80896
Abstract: Representative techniques and devices including process steps may be employed to mitigate the potential for delamination of bonded microelectronic substrates due to metal expansion at a bonding interface. For example, a metal pad may be disposed at a bonding surface of at least one of the microelectronic substrates, where the contact pad is positioned offset relative to a TSV in the substrate and electrically coupled to the TSV.
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