Invention Grant
- Patent Title: TSV as pad
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Application No.: US16439360Application Date: 2019-06-12
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Publication No.: US11749645B2Publication Date: 2023-09-05
- Inventor: Guilian Gao , Bongsub Lee , Gaius Gillman Fountain, Jr. , Cyprian Emeka Uzoh , Belgacem Haba , Laura Wills Mirkarimi , Rajesh Katkar
- Applicant: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.
- Applicant Address: US CA San Jose
- Assignee: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.
- Current Assignee: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.
- Current Assignee Address: US CA San Jose
- Agency: Knobbe, Martens, Olson & Bear LLP
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L21/768 ; H01L23/48 ; H01L23/482 ; H01L23/522 ; H01L23/00

Abstract:
Representative techniques and devices including process steps may be employed to mitigate the potential for delamination of bonded microelectronic substrates due to metal expansion at a bonding interface. For example, a through-silicon via (TSV) may be disposed through at least one of the microelectronic substrates. The TSV is exposed at the bonding interface of the substrate and functions as a contact surface for direct bonding.
Public/Granted literature
- US20190385935A1 TSV AS PAD Public/Granted day:2019-12-19
Information query
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