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    POOL-LEVEL SOLID STATE DRIVE ERROR CORRECTION
    1.
    发明申请
    POOL-LEVEL SOLID STATE DRIVE ERROR CORRECTION 审中-公开

    公开(公告)号：US20180011762A1

    公开(公告)日：2018-01-11

    申请号：US15205248

    申请日：2016-07-08

    申请人： Toshiba Corporation

    发明人： Yaron Klein

    IPC分类号： G06F11/10 ,  G11C29/52 ,  G06F3/06 ,  H03M13/29 ,  H03M13/11 ,  H03M13/15

    CPC分类号： G06F11/1044 ,  G06F11/1012 ,  G06F11/1072 ,  G11C29/52 ,  H03M13/1102 ,  H03M13/1515 ,  H03M13/152 ,  H03M13/2906

    摘要： A method for performing error correction for a plurality of storage drives and a storage appliance comprising a plurality of storage devices is disclosed. In one embodiment, the method includes generating a first set of parity bits from a first set of data of at least one of the plurality of storage devices, the first set of parity bits capable of correcting a first number of error bits of the first set of data. The method further includes generating a second set of parity bits from a concatenated set of the first data and a second set of data from at least another of the plurality of storage devices, the second set of parity bits capable of correcting a second number of error bits of the first set of data, the second number being greater than the first number. The method further includes reading the first set of data and (i) correcting error bits within the first set of data with the first set of parity bits where a number of error bits is less than the first number of error bits; and (ii) correcting error bits within the first set of data with the second set of parity bits where the number of error bits is greater than the first number.

    Light-Emitting Diode Package With Substantially In-Plane Light Emitting Surface and Fabrication Method
    4.
    发明申请
    Light-Emitting Diode Package With Substantially In-Plane Light Emitting Surface and Fabrication Method 审中-公开
    具有基本面向发光表面的发光二极管封装和制造方法

    公开(公告)号：US20160276559A1

    公开(公告)日：2016-09-22

    申请号：US14661379

    申请日：2015-03-18

    申请人： Toshiba Corporation

    发明人： Chih-Wei Chuang ,  Chao-Kun Lin ,  Kai Liu

    IPC分类号： H01L33/62 ,  H01L33/00 ,  H01L33/50

    CPC分类号： H01L33/62 ,  H01L33/385 ,  H01L33/486 ,  H01L33/54 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48464 ,  H01L2933/0033 ,  H01L2933/0066 ,  H01L2924/00014 ,  H01L2924/00

    摘要： The present specification discloses a novel light emitting diode package having a package substrate with a light emitting layer bonded to the package substrate. Unlike conventional LED packages (such as those shown in FIGS. 1 and 2), the chip handling substrate typically located between the package substrate and the light emitting layer is not present. In addition, the LED package of the present specification may comprise an insulating layer formed on the package substrate and the light emitting layer. The LED package of the present specification may further comprise an interconnect metal formed on the insulating layer and the light emitting layer, wherein the interconnect metal electrically connects the light emitting layer to the package substrate.

    摘要翻译： 本说明书公开了一种新颖的发光二极管封装，其具有封装衬底，发光层与封装衬底结合。 与传统的LED封装（例如图1和图2所示）不同，通常位于封装基板和发光层之间的芯片处理基板不存在。 此外，本说明书的LED封装可以包括形成在封装基板和发光层上的绝缘层。 本说明书的LED封装还可以包括在绝缘层和发光层上形成的互连金属，其中互连金属将发光层电连接到封装基板。

    Light Emitting Diodes With Current Confinement
    5.
    发明申请
    Light Emitting Diodes With Current Confinement 审中-公开
    发光二极管与目前的限制

    公开(公告)号：US20160064603A1

    公开(公告)日：2016-03-03

    申请号：US14468831

    申请日：2014-08-26

    申请人： Toshiba Corporation

    发明人： Chao-Kun Lin ,  Wei Zhao

    IPC分类号： H01L33/14 ,  H01L33/62

    CPC分类号： H01L33/145 ,  H01L33/405

    摘要： A light emitting diode (LED) assembly with a current blocking layer along the periphery of the LED is disclosed. In one embodiment, the LED assembly includes an LED comprising a light emitting layer disposed between a first layer having a first conductivity type and a second layer having a second conductivity type. The LED assembly further includes a contact electrically coupled to the first layer and a current blocking layer formed along a periphery of the LED at an interface with the contact, and covering a peripheral portion of the first contact. The current blocking layer forms a non-ohmic connection with the contact, thereby limiting the current injection between the contact and the first layer of the LED. In one embodiment, the current blocking layer surrounds a portion of the first layer, defining a portion of the light emitting layer that emits photons. In one embodiment, the current blocking layer comprises a transparent insulating layer between the LED and the contact. In one embodiment, the current blocking layer comprises a plasma treated region of the first layer of the LED.

    摘要翻译： 公开了一种具有沿着LED周边的电流阻挡层的发光二极管（LED）组件。 在一个实施例中，LED组件包括LED，其包括设置在具有第一导电类型的第一层和具有第二导电类型的第二层之间的发光层。 LED组件还包括电耦合到第一层的触点和在与触点的界面处沿LED的周边形成的电流阻挡层，并且覆盖第一触点的周边部分。 电流阻挡层与触点形成非欧姆连接，从而限制了触点与LED的第一层之间的电流注入。 在一个实施例中，电流阻挡层围绕第一层的一部分，限定发射光子的发光层的一部分。 在一个实施例中，电流阻挡层包括在LED和触点之间的透明绝缘层。 在一个实施例中，电流阻挡层包括LED的第一层的等离子体处理区域。

    High Efficiency Light Emitting Diode Package Suitable for Wafer Level Packaging
    6.
    发明申请
    High Efficiency Light Emitting Diode Package Suitable for Wafer Level Packaging 有权
    高效发光二极管封装适用于晶圆级封装

    公开(公告)号：US20150303359A1

    公开(公告)日：2015-10-22

    申请号：US14256715

    申请日：2014-04-18

    申请人： Toshiba Corporation

    发明人： Kai Liu ,  Chao-Kun Lin

    IPC分类号： H01L33/58 ,  H01L33/54 ,  H01L33/56 ,  H01L33/50

    CPC分类号： H01L33/58 ,  H01L33/507 ,  H01L33/54 ,  H01L33/56 ,  H01L2933/0033 ,  H01L2933/0041 ,  H01L2933/005 ,  H01L2933/0058

    摘要： An LED package and method for LED packaging is disclosed. In one embodiment, an LED package includes a carrier substrate having a predefined surface area, an LED device bonded to the carrier substrate, the LED device having a footprint area of at least fifty percent of the predefined surface area of the carrier substrate, and an encapsulant lens having a top surface inclined inwardly at an angle in the range of about 10° to about 140°. In one embodiment, the top surface of the encapsulant lens layer has a concave cone shape. In one embodiment, a wafer level packaging process includes forming an encapsulant lens layer portion having a top surface inclined inwardly at an angle in the range of about 10° to about 140° on each of a plurality of LED devices bonded to a carrier substrate wafer.

    摘要翻译： 公开了一种用于LED封装的LED封装和方法。 在一个实施例中，LED封装包括具有预定表面积的载体衬底，结合到载体衬底的LED器件，LED器件具有占载体衬底的预定表面积的至少百分之五十的覆盖区域，以及 密封透镜具有向上倾斜约10°至约140°范围内的顶部表面。 在一个实施例中，密封透镜层的顶表面具有凹锥形。 在一个实施例中，晶片级封装工艺包括形成密封透镜层部分，该封装透镜层部分具有在大约10°至大约140°范围内向内倾斜的顶表面，所述顶表面在结合到载体衬底晶片的多个LED器件中的每一个上 。

    SOLID STATE DRIVE WITH IMPROVED POWER EFFICIENCY
    8.
    发明申请
    SOLID STATE DRIVE WITH IMPROVED POWER EFFICIENCY 有权

    公开(公告)号：US20170352422A1

    公开(公告)日：2017-12-07

    申请号：US15173945

    申请日：2016-06-06

    申请人： Toshiba Corporation

    发明人： Stephen K. Pardoe

    IPC分类号： G11C16/10 ,  G11C16/14 ,  G11C16/26 ,  G11C16/30

    CPC分类号： G11C16/10 ,  G11C16/14 ,  G11C16/26 ,  G11C16/30

    摘要： A solid state drive (SSD) with improved power efficiency includes one or more non-volatile memory devices configured to operate according to a programming voltage for a program function or an erase function and to a supply voltage for a read function. The SSD also includes a voltage regulator, external of the one or more non-volatile memory devices, having an output connected to the one or more non-volatile memory devices to supply the programming voltage and an input connected to receive a first voltage, the voltage regulator configured to convert the first voltage to the programming voltage. A discrete capacitor is connected to supply the first voltage to the voltage regulator. The one or more non-volatile memory devices operate according to the programming voltage supplied by the voltage regulator during both the normal operation of the SSD and in the event of a power loss or failure of the SSD.