公开(公告)号：US08093586B2

公开(公告)日：2012-01-10

申请号：US12450462

申请日：2008-01-30

申请人： Noriyuki Shimoji ,  Suguru Okuyama ,  Yoshiaki Oku

发明人： Noriyuki Shimoji ,  Suguru Okuyama ,  Yoshiaki Oku

IPC分类号： H01L35/24 ,  H01L51/00 ,  H01L29/04 ,  H01L27/15 ,  H01L33/00

CPC分类号： H01L27/3274 ,  H01L27/3248 ,  H01L51/0055 ,  H01L51/006 ,  H01L51/0081 ,  H01L51/0541

摘要： A hybrid organic light-emitting transistor device and a manufacturing method thereof are provided. The hybrid organic light-emitting transistor device includes at least one organic light-emitting diode device and at least one organic thin-film transistor device placed on the same substrate. The organic light-emitting diode device has a first organic layer placed between an anode and a cathode, and the organic thin-film transistor device has a second organic layer placed on a source electrode and a drain electrode. The first organic layer and the second organic layer are spatially isolated from each other, and an organic material forming the second organic layer is identical to an organic material forming the first organic layer. The hybrid organic light-emitting transistor with a reduced pixel size and an improved aperture ratio can be easily obtained.

摘要翻译： 提供了一种混合有机发光晶体管器件及其制造方法。 混合有机发光晶体管器件包括至少一个有机发光二极管器件和放置在同一衬底上的至少一个有机薄膜晶体管器件。 有机发光二极管器件具有放置在阳极和阴极之间的第一有机层，有机薄膜晶体管器件具有置于源电极和漏电极上的第二有机层。 第一有机层和第二有机层在空间上彼此隔离，形成第二有机层的有机材料与形成第一有机层的有机材料相同。 可以容易地获得具有减小的像素尺寸和改善的孔径比的混合有机发光晶体管。

公开(公告)号：US07923721B2

公开(公告)日：2011-04-12

申请号：US12229000

申请日：2008-08-19

申请人： Suguru Okuyama ,  Yoshiaki Oku ,  Noriyuki Shimoji

发明人： Suguru Okuyama ,  Yoshiaki Oku ,  Noriyuki Shimoji

IPC分类号： H01L51/00

CPC分类号： H01L51/0545 ,  H01L51/0036 ,  H01L51/0037 ,  H01L51/0053 ,  H01L51/0541 ,  H01L51/0554 ,  H01L51/0562

摘要： An organic thin film transistor including: a substrate; a gate electrode placed on the substrate; a gate insulating film placed on the gate electrode; a source electrode and a drain electrode which are placed on the gate insulating film; an organic semiconductor layer placed on the gate insulating film between the source electrode and the drain electrode; a hole transport layer placed on the organic semiconductor layer; an electron transport layer placed on the hole transport layer; and a conductor layer placed on the electron transport layer; the organic thin film transistor which characteristics are stable by being protected from oxygen or moisture and being protected electromagnetically and which is suitable for integration.

摘要翻译： 一种有机薄膜晶体管，包括：基板; 放置在基板上的栅电极; 栅极绝缘膜放置在栅电极上; 放置在栅极绝缘膜上的源电极和漏电极; 位于源电极和漏电极之间的栅极绝缘膜上的有机半导体层; 放置在有机半导体层上的空穴传输层; 放置在空穴传输层上的电子传输层; 以及放置在电子传输层上的导体层; 该有机薄膜晶体管的特征通过被氧气或湿气保护并被电磁保护并且适于一体化而稳定。

公开(公告)号：US07701022B2

公开(公告)日：2010-04-20

申请号：US10426015

申请日：2003-04-30

申请人： Noriyuki Shimoji ,  Masaki Takaoka

发明人： Noriyuki Shimoji ,  Masaki Takaoka

IPC分类号： H01L29/84

CPC分类号： F04B43/043 ,  B81B2203/0353 ,  B81C1/00626 ,  B81C2201/0136 ,  H01L29/0657

摘要： A semiconductor device and a method of producing the same is disclosed, in which a through hole is formed in the upper surface of a semiconductor substrate from the lower surface thereof, and an opening of a desired size is formed in a desired position on the upper surface of the substrate. A guide that functions as an etching stopper is formed in the semiconductor substrate. An opening having a width W2 is formed in the guide. The opening faces an opening in a mask used in the formation of a through hole, and the width W2 thereof is narrower than a width W4 of the opening in the mask. The direction in which etching progresses is controlled by the opening formed in the guide as etching is conducted from a lower surface of the substrate to an upper surface of the substrate, and thus deviations in the width W1 and position of an opening in the upper surface of the substrate can be controlled.

摘要翻译： 公开了一种半导体器件及其制造方法，其中从半导体衬底的下表面形成在半导体衬底的上表面中的通孔，并且在上部的所需位置形成所需尺寸的开口 基板的表面。 在半导体衬底中形成用作蚀刻阻挡层的引导件。 在导向件中形成具有宽度W2的开口。 开口面对形成通孔的掩模中的开口，其宽度W2比掩模中的开口的宽度W4窄。 蚀刻进行的方向由形成在引导件中的开口作为蚀刻控制，从基板的下表面传导到基板的上表面，因此在上表面中的宽度W1和开口的位置 可以控制基板。

公开(公告)号：US20090305033A1

公开(公告)日：2009-12-10

申请号：US12309402

申请日：2007-07-12

申请人： Hiroyuki Yano ,  Masaya Nogi ,  Kentaro Abe ,  Shinsuko Ifuku ,  Noriyuki Shimoji ,  Yoshiaki Oku ,  Suguru Okuyama

发明人： Hiroyuki Yano ,  Masaya Nogi ,  Kentaro Abe ,  Shinsuko Ifuku ,  Noriyuki Shimoji ,  Yoshiaki Oku ,  Suguru Okuyama

IPC分类号： B32B5/02 ,  B32B27/12 ,  B05D3/02

CPC分类号： D21H21/26 ,  Y10T428/26 ,  Y10T428/269 ,  Y10T442/20 ,  Y10T442/614

摘要： A highly transparent fiber composite material is provided that can be manufactured through a simplified process using reduced amounts of raw materials and that has high flexibility and low thermal expansivity and retains good functionality of the fiber material. The fiber composite material includes: a fiber assembly having an average fiber diameter of 4 to 200 nm and a 50 μm-thick visible light transmittance of 3% or more; and a coating layer that coats and smoothes the surface of the fiber assembly, wherein the fiber composite material has a 50 μm-thick visible light transmittance of 60% or more. With this fiber assembly, the scattering of light caused by the irregularities on the surface can be suppressed by coating the surface with the coating layer to smooth the surface, whereby a highly transparent fiber composite material can be obtained.

摘要翻译： 提供了一种高度透明的纤维复合材料，其可以通过使用减少量的原材料的简化工艺制造，并且具有高柔性和低热膨胀性并保持纤维材料的良好功能。 纤维复合材料包括：平均纤维直径为4〜200nm，50μm厚的可见光透射率为3％以上的纤维集合体; 以及涂布所述纤维集合体的表面的涂层，其中，所述纤维复合材料具有50μm厚的可见光透射率为60％以上。 利用该纤维集合体，可以通过用涂层涂布表面来平滑表面，由表面上的凹凸引起的光的散射被抑制，由此可以获得高度透明的纤维复合材料。

公开(公告)号：US20090102358A1

公开(公告)日：2009-04-23

申请号：US11921802

申请日：2006-06-06

申请人： Noriyuki Shimoji ,  Masato Moriwake ,  Takaaki Fuchikami ,  Hiroki Kato

发明人： Noriyuki Shimoji ,  Masato Moriwake ,  Takaaki Fuchikami ,  Hiroki Kato

IPC分类号： H01J1/62 ,  B05D5/12

CPC分类号： H01L51/5234 ,  H01L27/3244 ,  H01L51/5271 ,  H01L2251/5315

摘要： An organic EL element (Al) includes an anode (2) and a cathode (4) which are arranged opposite to each other, and an organic layer (3) intervening between the anode (2) and the cathode (4) and including a light emitting layer (3b). The cathode (4) is made of MgAg alloy and has a thickness of not more than 200 Å. Preferably, the thickness of the cathode (4) is in the range of 40 to 100 Å.

摘要翻译： 有机EL元件（A1）包括彼此相对布置的阳极（2）和阴极（4）和介于阳极（2）和阴极（4）之间的有机层（3），并且包括 发光层（3b）。 阴极（4）由MgAg合金制成，厚度不大于200。 优选地，阴极（4）的厚度在40〜100的范围内。

公开(公告)号：US20080237580A1

公开(公告)日：2008-10-02

申请号：US10593726

申请日：2005-03-17

申请人： Suguru Okuyama ,  Noriyuki Shimoji

发明人： Suguru Okuyama ,  Noriyuki Shimoji

IPC分类号： H01L51/00

CPC分类号： H01L27/3262 ,  H01L27/3248 ,  H01L27/3265 ,  H01L27/3274 ,  H01L51/0541 ,  H01L51/0545 ,  H01L51/057

摘要： It is provided an organic semiconductor element having an FET which can control a channel length to a small value and does not cause a rise in contact resistance due to a step portion, and an organic light emitting display device with a large aperture using the same. A first conductive layer (2) which is one of source/drain electrodes is provided onto a substrate (1), and an organic semiconductor layer (3) and a second conductive layer (4) which is the other electrode of the source/drain electrodes are provided onto the first conductive layer (2). Then on a side face of the organic semiconductor layer or a front surface of the organic semiconductor layer (3) exposed by removing a part of the second conductive layer and a side face of the second conductive layer a gate electrode (third conductive layer) (6) is provided via an insulating layer (5), thereby to form an FET. The organic EL display device has the FET having such structure laminated on an organic EL section as a drive element.

摘要翻译： 提供了一种有机半导体元件，其具有FET，其能够将沟道长度控制在较小的值，并且不会引起由于台阶部分引起的接触电阻的上升，以及具有大孔径的有机发光显示装置。 作为源极/漏极之一的第一导电层（2）设置在基板（1）上，并且有机半导体层（3）和第二导电层（4）作为源极/漏极的另一个电极 电极设置在第一导电层（2）上。 然后在有机半导体层的侧面或通过去除第二导电层的一部分和第二导电层的侧面而露出的有机半导体层（3）的前表面上形成栅电极（第三导电层）（ 6）经由绝缘层（5）提供，从而形成FET。 有机EL显示装置具有层叠在作为驱动元件的有机EL部分上的这种结构的FET。

公开(公告)号：US06528388B2

公开(公告)日：2003-03-04

申请号：US10098339

申请日：2002-03-18

申请人： Noriyuki Shimoji

发明人： Noriyuki Shimoji

IPC分类号： H01L2176

CPC分类号： H01L21/76251 ,  H01L21/3225 ,  H01L21/76254 ,  H01L21/76259 ,  H01L21/8221 ,  H01L21/84 ,  H01L27/0688 ,  H01L27/1203 ,  H01L29/78603 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/9202 ,  H01L2924/00014

摘要： (a) At first a semiconductor substrate (11) having a lacunose layer (12) disposed at a equal depth (h) from the surface of a semiconductor layer (1) is formed; (b) then electric components (2), for example, transistors, or lines (3) for an electric circuit are formed on the semiconductor layer (1) at the surface side with respect to the lacunose layer (12); (c) then the semiconductor substrate is separated at the lacunose layer; (d) and an insulating layer (5) is formed on the surface exposed by the separation. The ultrathin semiconductor device has a thickness lower than 20 micro meters. As a result, a thin semiconductor device, having an SOI structure, for example can be fabricated, without the electric components and the insulating layer being influenced by charging up, which may appear during the manufacturing process. And it is also possible to realize a three dimensional semiconductor device.

公开(公告)号：US6130130A

公开(公告)日：2000-10-10

申请号：US208534

申请日：1998-12-09

申请人： Masataka Tsuruta ,  Noriyuki Shimoji ,  Takuya Yonezawa

发明人： Masataka Tsuruta ,  Noriyuki Shimoji ,  Takuya Yonezawa

IPC分类号： H01L21/82 ,  H01L21/336 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/423

CPC分类号： H01L27/11521 ,  H01L27/115 ,  H01L27/11524 ,  H01L29/42324 ,  H01L29/66825

摘要： An ONO layer 18 located vicinity of a transistor TR1 for programming is removed. A floating gate FG1 of the transistor TR1 is formed by carrying out etching of a polysilicon layer 16. Then, an inter-layer film SM1 of the transistor TR1 is formed by carrying out oxidation process. The inter-layer film SM1 is formed so as to cover the floating gate FG1. Arsenic is implanted ionically into a semiconductor-substrate 12 using the floating gate FG1 and the inter-layer film SM1 as a mask. Ions of the arsenic thus implanted do not pass through the inter-layer film SM1 and are stopped at the surface. Because the inter-layer film SM1 is made of a silicon oxidation layer formed relatively thick. So that, the inter-layer film SM1 maintains its charge-storage characteristic originally owns even when the ion implantation is carried out.

摘要翻译： 位于用于编程的晶体管TR1的附近的ONO层18被去除。 通过进行多晶硅层16的蚀刻来形成晶体管TR1的浮置栅极FG1。然后，通过进行氧化处理形成晶体管TR1的层间膜SM1。 层间膜SM1形成为覆盖浮栅FG1。 使用浮栅FG1和层间膜SM1作为掩模将砷离子注入到半导体衬底12中。 这样植入的砷离子不会通过层间膜SM1而停止在表面。 因为层间膜SM1由相对较厚的硅氧化层制成。 因此，即使进行离子注入，层间膜SM1也保持原来的电荷存储特性。

公开(公告)号：US5821578A

公开(公告)日：1998-10-13

申请号：US730223

申请日：1996-10-15

申请人： Noriyuki Shimoji

发明人： Noriyuki Shimoji

IPC分类号： H01L21/8247 ,  G11C11/22 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/105 ,  H01L27/108 ,  H01L27/115 ,  H01L29/78 ,  H01L29/788 ,  H01L29/792 ,  H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113

CPC分类号： H01L27/115 ,  G11C11/22 ,  H01L29/78391 ,  G11C11/223

摘要： A floating gate (FG) of a ferroelectric transistor (FTR11) and a source (SS) of a selecting transistor (STR11) are interconnected. A control gate (FCG) of the ferroelectric transistor (FTR11) is connected to a word line (WL1), a drain (SD) of the selecting transistor (STR11) is connected to a bit line (BL11), and a gate (SG) of the selecting transistor (STR11) is connected to a gate line (G). In the writing mode, "5V" is given to the gate line (G) to set the selecting transistors (STR11, . . . ) to the on state. A ferroelectric layer (FM) is polarized by giving a suitable voltage to the word lines (WL1, . . . ) and the bit lines (BL1, . . . ). In the operation mode, "0V" is given to the gate line (G) to set the selecting transistors (STR11, . . . ) to the off state.

摘要翻译： 铁电晶体管（FTR11）的浮栅（FG）和选择晶体管（STR11）的源极（SS）互连。 铁电晶体管（FTR11）的控制栅极（FCG）连接到字线（WL1），选择晶体管（STR11）的漏极（SD）连接到位线（BL11），栅极（SG ）连接到栅极线（G）。 在写入模式中，对栅极线（G）施加“5V”，以将选择晶体管（STR11，...）设置为导通状态。 铁电层（FM）通过向字线（WL1，...）和位线（BL1，...）提供合适的电压而被极化。 在操作模式中，对栅极线（G）赋予“0V”，以将选择晶体管（STR11，...）设置为截止状态。

公开(公告)号：US5463579A

公开(公告)日：1995-10-31

申请号：US401306

申请日：1995-03-09

申请人： Noriyuki Shimoji

发明人： Noriyuki Shimoji

IPC分类号： G11C17/00 ,  G11C16/02 ,  G11C16/04 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/423 ,  H01L29/788 ,  H01L29/792 ,  G11C11/34

CPC分类号： G11C16/0491 ,  H01L27/115 ,  H01L29/42324 ,  H01L29/7883

摘要： A virtual ground array semiconductor memory device includes a matrix of memory cells, which performs writing and erasing operations utilizing FN current, reduces the electric power consumption and the deterioration of a tunnel insulating film. Each memory cell has a floating gate on one side of a channel region and a control gate covering the floating gate and the other side of the channel region.

摘要翻译： 虚拟接地阵列半导体存储器件包括利用FN电流进行写入和擦除操作的存储器单元矩阵，减少了电力消耗和隧道绝缘膜的劣化。 每个存储单元在通道区域的一侧上具有浮动栅极，覆盖浮动栅极和沟道区域的另一侧的控制栅极。