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    Voltage generating circuit
    1.
    发明授权
    Voltage generating circuit 有权
    电压发生电路

    公开(公告)号：US09564805B2

    公开(公告)日：2017-02-07

    申请号：US14009715

    申请日：2012-04-09

    申请人： Shinya Sano ,  Masashi Horiguchi ,  Takahiro Miki ,  Mitsuru Hiraki

    发明人： Shinya Sano ,  Masashi Horiguchi ,  Takahiro Miki ,  Mitsuru Hiraki

    IPC分类号： H02M3/158 ,  G05F3/30 ,  G05F3/26

    CPC分类号： G05F3/267 ,  G05F3/20 ,  G05F3/26 ,  G05F3/30 ,  H02M3/158

    摘要： A voltage generating circuit, in which the influence of offset of an amplifier on an output voltage is reduced, has first and second bipolar transistors (Q1, Q2) having emitter terminals at the same electric potential. A base terminal of Q1 is disposed on a collector side of Q2. A first resistance element connects the collector side of Q2 with the base side of Q2; and a second resistance element (R1) connects a collector side of Q1 to R2. A third resistance element (R3) connects a base terminal of Q2 with the electric potential of the emitter terminals. An amplifier (A1) outputs a voltage based on a voltage difference between the collector sides of Q1 and Q2; and a voltage-current converting section (MP1, MP2) converts amplifier output into a current supplied to the connection node of R1 and R2. A voltage is then output on the basis of the generated current.

    摘要翻译： 其中放大器的偏移对输出电压的影响减小的电压产生电路具有在相同电位的发射极端子的第一和第二双极晶体管（Q1，Q2）。 Q1的基极端子设置在Q2的集电极侧。 第一电阻元件将Q2的集电极侧与Q2的基极侧连接; 并且第二电阻元件（R1）将Q1的集电极侧连接到R2。 第三电阻元件（R3）将Q2的基极端子与发射极端子的电位相连。 放大器（A1）输出基于Q1和Q2的集电极侧之间的电压差的电压; 电压电流转换部（MP1，MP2）将放大器输出转换为R1和R2的连接节点的电流。 然后基于所产生的电流输出电压。

    Semiconductor circuit device and data processing system
    3.
    发明申请
    Semiconductor circuit device and data processing system 有权
    半导体电路设备和数据处理系统

    公开(公告)号：US20110115461A1

    公开(公告)日：2011-05-19

    申请号：US12926516

    申请日：2010-11-23

    申请人： Masashi Horiguchi ,  Mitsuru Hiraki

    发明人： Masashi Horiguchi ,  Mitsuru Hiraki

    IPC分类号： G05F3/02

    CPC分类号： G05F3/242 ,  H01L2224/16145 ,  H01L2224/32245 ,  H01L2224/48137 ,  H01L2224/4826 ,  H01L2224/73215 ,  Y10T307/76 ,  H01L2924/00

    摘要： Occurrence of power supply noise arising in connection with a step-down action at the time of turning on power supply is to be restrained. A step-down unit is provided with a switched capacitor type step-down circuit and a series regulator type step-down circuit, and stepped-down voltage output terminals of the step-down circuits are connected in common. The common connection of the stepped-down voltage output terminals of both step-down circuits makes possible parallel driving of both, selective driving of either or consecutive driving of the two. In the consecutive driving, even if the switched capacitor type step-down circuit is driven after driving the series regulator type step-down circuit first to supply a stepped-down voltage to loads, the switched capacitor type step-down circuit will need only to be compensated for a discharge due to the loads, and a peak of a charge current for capacitors can be kept low. When operation of the switched capacitor type step-down circuit is started, no large rush current arises, and occurrence of noise is restrained.

    摘要翻译： 限制在接通电源时与降压动作相关的电源噪声的发生。 降压单元设置有开关电容器型降压电路和串联调节器型降压电路，降压电路的降压电压输出端子共同连接。 两个降压电路的降压电压输出端子的共同连接使得两者的并联驱动成为可能的两者的选择性驱动，或者是两者的连续驱动。 在连续驱动中，即使在驱动串联调节器型降压电路之后驱动开关电容器型降压电路以向负载提供降压电压，开关电容器类型降压电路仅需要 由于负载而被补偿放电，并且可以将电容器的充电电流的峰值保持为低。 当开关电容器型降压电路的工作开始时，不产生大的冲击电流，并且抑制噪声的发生。

    Semiconductor integrated circuit
    4.
    发明授权
    Semiconductor integrated circuit 有权
    半导体集成电路

    公开(公告)号：US07881026B2

    公开(公告)日：2011-02-01

    申请号：US12606715

    申请日：2009-10-27

    申请人： Takayasu Ito ,  Mitsuru Hiraki ,  Koichi Ashiga

    发明人： Takayasu Ito ,  Mitsuru Hiraki ,  Koichi Ashiga

    IPC分类号： H02H3/22

    CPC分类号： H01L23/50 ,  H01L23/60 ,  H01L24/06 ,  H01L27/0207 ,  H01L27/0266 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2924/01029 ,  H01L2924/12032 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H02M3/00 ,  H02M3/07 ,  H02M3/157 ,  H01L2924/00

    摘要： An integrated circuit formed on a semiconductor chip includes voltage regulators for stepping down an externally-supplied power voltage to produce an internal power voltage, and internal circuits which operate based on the internal power voltage. The voltage regulators are laid in the area of the buffers and protective elements for the input/output signals and power voltages so that the overhead area due to the on-chip provision of the voltage regulators is minimized. The internal power voltage is distributed to the internal circuits through a looped main power line, with an electrode pad for connecting an external capacitor for stabilizing the internal power voltage being provided on it, so that the internal power voltage is stabilized and the power consumption of the integrated circuit is minimized.

    摘要翻译： 形成在半导体芯片上的集成电路包括用于降低外部提供的电源电压以产生内部电源电压的电压调节器，以及基于内部电源电压工作的内部电路。 电压调节器被放置在缓冲器和保护元件的区域中用于输入/输出信号和电源电压，使得由于电压调节器的片上提供而导致的开销面积被最小化。 内部电源电压通过环形主电源线分配到内部电路，电极焊盘用于连接外部电容器，用于稳定其上提供的内部电源电压，从而内部电源电压稳定，功耗 集成电路最小化。

    SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
    5.
    发明申请
    SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 审中-公开
    半导体集成电路设备

    公开(公告)号：US20100327841A1

    公开(公告)日：2010-12-30

    申请号：US12796033

    申请日：2010-06-08

    申请人： Takayasu ITO ,  Mitsuru HIRAKI ,  Masashi HORIGUCHI

    发明人： Takayasu ITO ,  Mitsuru HIRAKI ,  Masashi HORIGUCHI

    IPC分类号： G05F3/16

    CPC分类号： G11C5/147

    摘要： The present invention provides a technique for reducing current consumption in a reference voltage forming circuit without a significant increase in area while suppressing considerable degradative difference in reference voltage accuracy between a normal operation mode and a standby mode. In the standby mode, by using a clock signal fed from an oscillator circuit, the frequency-division control circuit produces an enable signal VREFON for determining ON/OFF states of the reference voltage generator circuit, the reference voltage forming circuit, and the capacitance charging regulator, and also produces a sampling/holding signal CHOLDSW for performing control so that a holding capacitor CH in a holding capacitance circuit is charged during an ON period of the reference voltage generator circuit, the reference voltage forming circuit, and the capacitance charging regulator, and so that any paths other than a leak current path are made unavailable to the holding capacitor CH during an OFF period thereof. Current consumption can be reduced significantly by intermittently turning ON/OFF the reference voltage generator circuit, the reference voltage forming circuit, and the capacitance charging regulator, each of which would otherwise consume a relatively large amount of current for operation thereof.

    摘要翻译： 本发明提供一种降低参考电压形成电路中的电流消耗而不显着增加面积的技术，同时抑制正常操作模式和待机模式之间参考电压精度的相当大的降低差异。 在待机模式中，通过使用从振荡电路馈送的时钟信号，分频控制电路产生用于确定参考电压发生器电路，参考电压形成电路和电容充电的ON / OFF状态的使能信号VREFON 并且还产生用于执行控制的采样/保持信号CHOLDSW，使得在参考电压发生器电路，参考电压形成电路和电容充电调节器的导通时段期间，保持电容电路中的保持电容器CH被充电， 并且使得除了漏电流路径之外的任何路径在保持电容器CH的OFF周期期间使其不可用。 通过间歇地打开/关闭参考电压发生器电路，参考电压形成电路和电容充电调节器，可以大大减少电流消耗，否则每个电容器将消耗相对大量的用于其操作的电流。

    Semiconductor circuit device and data processing system
    6.
    发明申请
    Semiconductor circuit device and data processing system 失效

    公开(公告)号：US20100109446A1

    公开(公告)日：2010-05-06

    申请号：US12654718

    申请日：2009-12-30

    申请人： Masashi Horiguchi ,  Mitsuru Hiraki

    发明人： Masashi Horiguchi ,  Mitsuru Hiraki

    IPC分类号： H02B1/24

    CPC分类号： G05F3/242 ,  H01L2224/16145 ,  H01L2224/32245 ,  H01L2224/48137 ,  H01L2224/4826 ,  H01L2224/73215 ,  Y10T307/76 ,  H01L2924/00

    摘要： Occurrence of power supply noise arising in connection with a step-down action at the time of turning on power supply is to be restrained. A step-down unit is provided with a switched capacitor type step-down circuit and a series regulator type step-down circuit, and stepped-down voltage output terminals of the step-down circuits are connected in common. The common connection of the stepped-down voltage output terminals of both step-down circuits makes possible parallel driving of both, selective driving of either or consecutive driving of the two. In the consecutive driving, even if the switched capacitor type step-down circuit is driven after driving the series regulator type step-down circuit first to supply a stepped-down voltage to loads, the switched capacitor type step-down circuit will need only to be compensated for a discharge due to the loads, and a peak of a charge current for capacitors can be kept low. When operation of the switched capacitor type step-down circuit is started, no large rush current arises, and occurrence of noise is restrained.

    Semiconductor integrated circuit device
    8.
    发明授权
    Semiconductor integrated circuit device 失效
    半导体集成电路器件

    公开(公告)号：US07394706B2

    公开(公告)日：2008-07-01

    申请号：US11717080

    申请日：2007-03-13

    申请人： Masashi Horiguchi ,  Mitsuru Hiraki

    发明人： Masashi Horiguchi ,  Mitsuru Hiraki

    IPC分类号： G11C7/00

    CPC分类号： G11C5/147 ,  H03K19/0013

    摘要： A semiconductor integrated circuit device with reduced consumption current is provided. A first step-down circuit stationarily forms internal voltage lower than supply voltage supplied through an external terminal. A second step-down circuit is switched between first mode and second mode according to control signals. In first mode, the internal voltage is formed from the supply voltage supplied through the external terminal and is outputted through a second output terminal. In second mode, operating current for a control system that forms the internal voltage is interrupted and an output high impedance state is established. The first output terminal of the first step-down circuit and the second output terminal of the second step-down circuit are connected in common, and the internal voltage is supplied to internal circuits.

    摘要翻译： 提供了具有降低的消耗电流的半导体集成电路器件。 第一降压电路固定地形成低于通过外部端子提供的电源电压的内部电压。 根据控制信号，第二降压电路在第一模式和第二模式之间切换。 在第一模式中，内部电压由通过外部端子提供的电源电压形成，并通过第二输出端子输出。 在第二模式中，形成内部电压的控制系统的工作电流被中断，并且建立了输出高阻抗状态。 第一降压电路的第一输出端子和第二降压电路的第二输出端子共同连接，并且内部电压被提供给内部电路。

    Semiconductor integrated circuit
    9.
    发明授权
    Semiconductor integrated circuit 失效
    半导体集成电路

    公开(公告)号：US07372245B2

    公开(公告)日：2008-05-13

    申请号：US11727559

    申请日：2007-03-27

    申请人： Takayasu Ito ,  Mitsuru Hiraki ,  Masashi Horiguchi ,  Tadashi Kameyama

    发明人： Takayasu Ito ,  Mitsuru Hiraki ,  Masashi Horiguchi ,  Tadashi Kameyama

    IPC分类号： G05F3/16 ,  G05F3/20

    CPC分类号： G05F3/222

    摘要： A difference between both emitter voltages of a first transistor having an emitter through which a first current flows, and at least one second transistor having an emitter through which such a second current as to reach a current density thereof smaller than that of the emitter of the first transistor flows, is applied across a first resistor. A second resistor is provided between the emitter of the second transistor and a circuit's ground potential. A third resistor and a fourth resistor are respectively provided between collectors of the first and second transistors and a power supply voltage. Such an output voltage that a collector voltage of the first transistor and a collector voltage of the second transistor become equal is formed in response to the collector voltage of the first transistor and the collector voltage of the second transistor and supplied to bases of the first and second transistors in common. A temperature sense voltage is formed from a connecting point of the first and second resistors.

    摘要翻译： 具有第一电流流经的发射极的第一晶体管的两个发射极电压和至少一个具有发射极的第二晶体管之间的差异，通过该发射极，这样的第二电流达到其电流密度小于 第一晶体管流过第一电阻器。 第二电阻器设置在第二晶体管的发射极和电路的地电位之间。 分别在第一和第二晶体管的集电极之间设置第三电阻器和第四电阻器，以及电源电压。 响应于第一晶体管的集电极电压和第二晶体管的集电极电压而形成第一晶体管的集电极电压和第二晶体管的集电极电压相等的这种输出电压，并被提供给第一晶体管的基极和 第二个晶体管是共同的。 温度感测电压由第一和第二电阻器的连接点形成。

    Semiconductor integrated circuit
    10.
    发明申请
    Semiconductor integrated circuit 失效

    公开(公告)号：US20070170907A1

    公开(公告)日：2007-07-26

    申请号：US11727559

    申请日：2007-03-27

    申请人： Takayasu Ito ,  Mitsuru Hiraki ,  Masashi Horiguchi ,  Tadashi Kameyama

    发明人： Takayasu Ito ,  Mitsuru Hiraki ,  Masashi Horiguchi ,  Tadashi Kameyama

    IPC分类号： G05F3/20

    CPC分类号： G05F3/222

    摘要： A difference between both emitter voltages of a first transistor having an emitter through which a first current flows, and at least one second transistor having an emitter through which such a second current as to reach a current density thereof smaller than that of the emitter of the first transistor flows, is applied across a first resistor. A second resistor is provided between the emitter of the second transistor and a circuit's ground potential. A third resistor and a fourth resistor are respectively provided between collectors of the first and second transistors and a power supply voltage. Such an output voltage that a collector voltage of the first transistor and a collector voltage of the second transistor become equal is formed in response to the collector voltage of the first transistor and the collector voltage of the second transistor and supplied to bases of the first and second transistors in common. A temperature sense voltage is formed from a connecting point of the first and second resistors.