摘要:
In a nonvolatile memory array, data is stored in multi-level cells (MLC) as upper-page data and lower-page data. Safe copies of both upper-page and lower-page data are stored in on-chip cache during programming. If a write fail occurs, data is recovered from on-chip cache. The controller does not have to maintain safe copies of data.
摘要:
In a nonvolatile memory system, data received from a host by a memory controller is transferred to an on-chip cache, and new data from the host displaces the previous data before it is written to the nonvolatile memory array. A safe copy is maintained in on-chip cache so that if a program failure occurs, the data can be recovered and written to an alternative location in the nonvolatile memory array.
摘要:
A system for improving the management and usage of blocks based on intrinsic endurance may be used to improve memory usage for flash memory, such as a memory card. The overall card endurance may be extended by cycling blocks with higher intrinsic endurance over the lowest endurance target of the worst block. This may be accomplished by managing blocks with different intrinsic endurance values internally or by partitioning the blocks with different intrinsic endurance values externally for different usage.
摘要:
A memory device cooperating with a memory controller scrambles each unit of data using a selected scrambling key before storing it in an array of nonvolatile memory cells. This helps to reduce program disturbs, user read disturbs, and floating gate to floating gate coupling that result from repeated and long term storage of specific data patterns. For a given page of data having a logical address and for storing at a physical address, the key is selected from a finite sequence thereof as a function of both the logical address and the physical address. In a block management scheme the memory array is organized into erase blocks, the physical address is the relative page number in each block. When logical address are grouped into logical groups and manipulated as a group and each group is storable into a sub-block, the physical address is the relative page number in the sub-block.
摘要:
A method includes receiving hard bit data and soft bit data corresponding to a portion of a memory, where each storage element of the memory stores multiple bits per storage element. The hard bit data and the soft bit data is received in connection with reading a single bit of the multiple bits from each storage element in the portion of the memory based on one or more first read voltages. One or more second read voltages based on the hard bit data and the soft bit data are generated in response to a read voltage update operation. The memory reads data from the portion of the memory using the one or more second read voltages.
摘要:
A method of storing data onto a non-volatile memory includes receiving, from a host, first data that is originally assigned to a first storage area, programming the first data to a second storage area, receiving second data from the host, and while receiving the second data from the host, programming, to the first storage area, the first data that has been programmed to the second storage area, wherein the second data is received from the host simultaneously with the first data being programmed to the first storage area. The second storage area is capable of having data stored thereon faster than the first storage area.
摘要:
A memory device cooperating with a memory controller scrambles each unit of data using a selected scrambling key before storing it in an array of nonvolatile memory cells. This helps to reduce program disturbs, user read disturbs, and floating gate to floating gate coupling that result from repeated and long term storage of specific data patterns. For a given page of data having a logical address and for storing at a physical address, the key is selected from a finite sequence thereof as a function of both the logical address and the physical address. In a block management scheme the memory array is organized into erase blocks, the physical address is the relative page number in each block. When logical address are grouped into logical groups and manipulated as a group and each group is storable into a sub-block, the physical address is the relative page number in the sub-block.
摘要:
A method, system and graphical user interface for configuring a simulator. A graphical user interface may be used to define a configurable device profile, where a large number of devices for simulation by a simulator may be created based upon the configurable device profile. Once created, the devices may be individually configured and/or configured in groups. Additionally, the configuration of the devices may determine how the simulator generates and/or outputs simulated device data for the devices. For example, an attribute may be associated with a device which defines a format of the simulated device data, a rate at which the simulated device data is output, a range of values for the simulated device data, or an operating parameter of the device. An attribute specifying the communicative coupling of the devices may also be defined. Further, the simulated device data may include a data value.
摘要:
A method, system and graphical user interface for configuring a simulator. A graphical user interface may be used to define a configurable device profile, where a large number of devices for simulation by a simulator may be created based upon the configurable device profile. Once created, the devices may be individually configured and/or configured in groups. Additionally, the configuration of the devices may determine how the simulator generates and/or outputs simulated device data for the devices. For example, an attribute may be associated with a device which defines a format of the simulated device data, a rate at which the simulated device data is output, a range of values for the simulated device data, or an operating parameter of the device. An attribute specifying the communicative coupling of the devices may also be defined. Further, the simulated device data may include a data value.
摘要:
A method and system for simulating a plurality of devices are disclosed. A simulator configured to simulate a plurality of devices may output simulated device data for the plurality of devices, where the output of the simulated device data may be performed based upon execution of commands by the simulator. The commands may be received from a device abstraction layer in response to a request from the simulator for any commands associated with the plurality of devices. Additionally, the simulated device data may be communicated to a component coupled to the simulator, where a result of the processing of the simulated device data by the component may be used to analyze the performance of the component. Further, other commands may be executed by simulator for changing the frequency at which simulated device data is output, for performing another operation defined during configuration of the simulator, etc.