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公开(公告)号：US08222529B2
公开(公告)日：2012-07-17
申请号：US12588502
申请日：2009-10-16
Applicant: Je Hong Sung , Jin Waun Kim , Myung Whun Chang
Inventor： Je Hong Sung , Jin Waun Kim , Myung Whun Chang
IPC: H05K1/03
CPC classification number: H05K3/4061 , H05K1/113 , H05K3/0029 , H05K3/245 , H05K3/4629 , H05K2201/096 , H05K2201/09827 , H05K2201/09845 , H05K2203/0242 , H05K2203/1476 , Y10T29/49117 , Y10T29/49126 , Y10T29/49149 , Y10T29/49155 , Y10T29/49165
Abstract: The present invention provides a ceramic substrate including: a ceramic stacked layer structure in which multiple ceramic layers are stacked to be interconnected through a via provided within each of the ceramic layers, the ceramic stacked layer structure having a hole provided therein to expose a top portion of the via provided within a ceramic layer of being a surface layer; a conductive material filled within the hole; and an external electrode formed on the surface of the ceramic stacked layer structure so that the external electrode is electrically connected to the conductive material, and a manufacturing method thereof.
Abstract translation: 本发明提供一种陶瓷基板，其特征在于，包括：陶瓷层叠体，其中多个陶瓷层通过设置在各陶瓷层内的通孔进行层叠而互连，所述陶瓷层叠体结构具有设置在其内的孔， 位于作为表层的陶瓷层内的通孔; 填充在孔内的导电材料; 以及外部电极，其形成在陶瓷层叠结构的表面上，使得外部电极与导电材料电连接，及其制造方法。
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公开(公告)号：US20100252305A1
公开(公告)日：2010-10-07
申请号：US12550812
申请日：2009-08-31
Applicant: Yoon Hyuck CHOI , Dae Hyeong Lee , Jin Waun Kim , Kwang Jae Oh
Inventor： Yoon Hyuck CHOI , Dae Hyeong Lee , Jin Waun Kim , Kwang Jae Oh
CPC classification number: H05K1/0201 , H01C1/148 , H01C7/003 , H05K1/0306 , H05K1/167 , H05K2201/066 , H05K2201/09909 , Y10T156/10
Abstract: There is provided a circuit board module and a method of manufacturing the same. The circuit board module may include: a circuit board; a resistor arranged on the circuit board; pads covering both edges of the resistor; adhesive portions provided at least on the pads and formed of an electrically insulating material; and a heat dissipation member provided on the resistor and bonded to the pads using the adhesive portions.The adhesive portions are selectively formed, thereby preventing short circuits occurring between the resistor mounted onto the circuit board and the heat dissipation member. Accordingly, the reliability of components can be increased.Furthermore, an adhesive material used to connect the board and the heat dissipation member is formed of a thermally conductive material, thereby increasing heat dissipation efficiency.
Abstract translation: 提供了一种电路板模块及其制造方法。 电路板模块可以包括：电路板; 布置在电路板上的电阻器; 覆盖电阻器两端的焊盘; 粘合剂部分至少设置在焊盘上并由电绝缘材料形成; 以及散热构件，其设置在所述电阻器上并且使用所述粘合部分结合到所述焊盘。 选择性地形成粘合剂部分，从而防止在安装到电路板上的电阻器和散热构件之间发生短路。 因此，可以提高部件的可靠性。 此外，用于连接板和散热构件的粘合材料由导热材料形成，从而提高散热效率。
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公开(公告)号：US20070007643A1
公开(公告)日：2007-01-11
申请号：US11428795
申请日：2006-07-05
Applicant: KWANG JAE OH , JE HONG SUNG , JIN WAUN KIM
Inventor： KWANG JAE OH , JE HONG SUNG , JIN WAUN KIM
IPC: H01L23/12
CPC classification number: H01L23/60 , H01L23/49827 , H01L23/49833 , H01L23/50 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/0657 , H01L2224/05554 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/49175 , H01L2224/73265 , H01L2225/0651 , H01L2225/06517 , H01L2225/06572 , H01L2225/06575 , H01L2924/00014 , H01L2924/07802 , H01L2924/09701 , H01L2924/10161 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/15184 , H01L2924/15311 , H01L2924/15313 , H01L2924/19041 , H01L2924/30107 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
Abstract: The invention provides a semiconductor multi-chip package including a substrate, a first semiconductor chip mounted on the substrate and a second semiconductor chip disposed directly above the first semiconductor chip. The package further includes a spacer disposed between the substrate and the second semiconductor chip to maintain a vertical interval between the first and second semiconductor chips and electrically connect the second semiconductor chip to the substrate. The invention minimizes noise generated through a bonding wire connecting the substrate with the chip to ensure stable operation of the chip, and reduces the size of the substrate and the number of mounted components, thereby achieving miniaturization of the package.
Abstract translation: 本发明提供一种半导体多芯片封装，其包括基板，安装在基板上的第一半导体芯片和直接设置在第一半导体芯片正上方的第二半导体芯片。 封装还包括设置在基板和第二半导体芯片之间的间隔件，以保持第一和第二半导体芯片之间的垂直间隔并将第二半导体芯片电连接到基板。 本发明使通过将基板与芯片连接的接合线产生的噪声最小化，以确保芯片的稳定操作，并且减小基板的尺寸和安装部件的数量，从而实现封装的小型化。
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公开(公告)号：US20110168439A1
公开(公告)日：2011-07-14
申请号：US12794118
申请日：2010-06-04
Applicant: Myung Whun CHANG , Jin Waun Kim , Dae Hyeong Lee , Ki Pyo Hong
Inventor： Myung Whun CHANG , Jin Waun Kim , Dae Hyeong Lee , Ki Pyo Hong
CPC classification number: H05K3/4629 , C04B37/001 , C04B2237/64 , H05K3/107
Abstract: There is provided a method of manufacturing a multilayer ceramic circuit board. A multilayer ceramic circuit board according to an aspect of the invention may include: preparing a plurality of ceramic green sheets; forming a recess having a desired line shape and a via hole connected to the recess in at least one of the plurality of ceramic green sheets; forming a conductive via by filling the via hole with a conductive material; forming a circuit line connected to the conductive via by filling the recess with a conductive material; stacking the plurality of ceramic green sheets upon one another to thereby form a ceramic green sheet stack; and sintering the ceramic green sheet stack.
Abstract translation: 提供一种制造多层陶瓷电路板的方法。 根据本发明的一个方面的多层陶瓷电路板可以包括：制备多个陶瓷生片; 在所述多个陶瓷生片中的至少一个中形成具有所需线状的凹部和与所述凹部连接的通孔; 通过用导电材料填充所述通孔来形成导电通孔; 通过用导电材料填充凹槽来形成连接到导电通孔的电路线; 将多个陶瓷生片堆叠在一起形成陶瓷生片叠层; 并烧结陶瓷生片堆叠。
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公开(公告)号：US20110091640A1
公开(公告)日：2011-04-21
申请号：US12973557
申请日：2010-12-20
Applicant: Jin Waun KIM , Seung Gyo Jeong
Inventor： Jin Waun KIM , Seung Gyo Jeong
IPC: H05K3/10 , B05D5/12 , H01L21/288
CPC classification number: C25D3/02 , B32B18/00 , C04B37/026 , C04B2237/12 , C04B2237/123 , C04B2237/124 , C04B2237/125 , C04B2237/32 , C04B2237/40 , C04B2237/403 , C04B2237/405 , C04B2237/408 , C04B2237/62 , C04B2237/68 , C23C18/1603 , C25D5/02 , H05K1/0306 , H05K3/1291 , H05K3/225 , H05K3/4061 , H05K3/42 , H05K3/429 , H05K2203/1126 , H05K2203/173 , Y10T428/24322
Abstract: A method of manufacturing a non-shrinking ceramic substrate according to an aspect of the invention may include: preparing a ceramic laminate having a via electrode therein; firing the ceramic laminate so that a void is formed at the interface between the via electrode and the ceramic laminate; and performing plating to fill the void with a conductive material.
Abstract translation: 根据本发明的一个方面的制造无收缩陶瓷基板的方法可以包括：制备其中具有通孔电极的陶瓷层压体; 烧结陶瓷层压体，使得在通孔电极和陶瓷层压体之间的界面处形成空隙; 并进行电镀以用导电材料填充空隙。
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Patent Agency Ranking
公开(公告)号：US20100098905A1
公开(公告)日：2010-04-22
申请号：US12475318
申请日：2009-05-29
Applicant: Jin Waun KIM , Seung Gyo Jeong
Inventor： Jin Waun KIM , Seung Gyo Jeong
CPC classification number: C25D3/02 , B32B18/00 , C04B37/026 , C04B2237/12 , C04B2237/123 , C04B2237/124 , C04B2237/125 , C04B2237/32 , C04B2237/40 , C04B2237/403 , C04B2237/405 , C04B2237/408 , C04B2237/62 , C04B2237/68 , C23C18/1603 , C25D5/02 , H05K1/0306 , H05K3/1291 , H05K3/225 , H05K3/4061 , H05K3/42 , H05K3/429 , H05K2203/1126 , H05K2203/173 , Y10T428/24322
Abstract: A method of manufacturing a non-shrinking ceramic substrate according to an aspect of the invention may include: preparing a ceramic laminate having a via electrode therein; firing the ceramic laminate so that a void is formed at the interface between the via electrode and the ceramic laminate; and performing plating to fill the void with a conductive material.
Abstract translation: 根据本发明的一个方面的制造无收缩陶瓷基板的方法可以包括：制备其中具有通孔电极的陶瓷层压体; 烧结陶瓷层压体，使得在通孔电极和陶瓷层压体之间的界面处形成空隙; 并进行电镀以用导电材料填充空隙。
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公开(公告)号：US08330049B2
公开(公告)日：2012-12-11
申请号：US12550812
申请日：2009-08-31
Applicant: Yoon Hyuck Choi , Dae Hyeong Lee , Jin Waun Kim , Kwang Jae Oh
Inventor： Yoon Hyuck Choi , Dae Hyeong Lee , Jin Waun Kim , Kwang Jae Oh
IPC: H05K1/00
CPC classification number: H05K1/0201 , H01C1/148 , H01C7/003 , H05K1/0306 , H05K1/167 , H05K2201/066 , H05K2201/09909 , Y10T156/10
Abstract: There is provided a circuit board module and a method of manufacturing the same. The circuit board module may include: a circuit board; a resistor arranged on the circuit board; pads covering both edges of the resistor; adhesive portions provided at least on the pads and formed of an electrically insulating material; and a heat dissipation member provided on the resistor and bonded to the pads using the adhesive portions.The adhesive portions are selectively formed, thereby preventing short circuits occurring between the resistor mounted onto the circuit board and the heat dissipation member. Accordingly, the reliability of components can be increased.Furthermore, an adhesive material used to connect the board and the heat dissipation member is formed of a thermally conductive material, thereby increasing heat dissipation efficiency.
Abstract translation: 提供了一种电路板模块及其制造方法。 电路板模块可以包括：电路板; 布置在电路板上的电阻器; 覆盖电阻器两端的焊盘; 粘合剂部分至少设置在焊盘上并由电绝缘材料形成; 以及散热构件，其设置在所述电阻器上并且使用所述粘合部分结合到所述焊盘。 选择性地形成粘合剂部分，从而防止在安装到电路板上的电阻器和散热构件之间发生短路。 因此，可以提高部件的可靠性。 此外，用于连接板和散热构件的粘合材料由导热材料形成，从而提高散热效率。
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公开(公告)号：US20110079420A1
公开(公告)日：2011-04-07
申请号：US12591735
申请日：2009-11-30
Applicant: Myung Whun CHANG , Dae Hyeong LEE , Ki Pyo HONG , Jin Waun KIM
Inventor： Myung Whun CHANG , Dae Hyeong LEE , Ki Pyo HONG , Jin Waun KIM
CPC classification number: H05K3/4061 , B32B18/00 , C04B35/645 , C04B2237/343 , C04B2237/348 , C04B2237/62 , C04B2237/68 , H05K3/4629 , H05K2201/0352 , H05K2201/096 , Y10T29/49117 , Y10T29/49204
Abstract: The present invention provides a multi-layered ceramic substrate including a first insulating sheet having a first via contact; and a second insulating sheet joined to the first insulating sheet, wherein the second insulating sheet has a second via contact aligned with the first via contact up and down to be joined to the first via contact, wherein the first via contact has a form extended to the inside of the second via contact.
Abstract translation: 本发明提供一种多层陶瓷基板，其包括具有第一通孔接点的第一绝缘片; 以及与所述第一绝缘片接合的第二绝缘片，其中所述第二绝缘片具有与所述第一通孔接触件对准的第二通孔接触件，所述第二通孔接触件被上下连接以连接到所述第一通孔接头，其中所述第一通孔接头具有延伸到 第二通孔接触件的内部。
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公开(公告)号：US20110042131A1
公开(公告)日：2011-02-24
申请号：US12588502
申请日：2009-10-16
Applicant: Je Hong Sung , Jin Waun Kim , Myung Whun Chang
Inventor： Je Hong Sung , Jin Waun Kim , Myung Whun Chang
CPC classification number: H05K3/4061 , H05K1/113 , H05K3/0029 , H05K3/245 , H05K3/4629 , H05K2201/096 , H05K2201/09827 , H05K2201/09845 , H05K2203/0242 , H05K2203/1476 , Y10T29/49117 , Y10T29/49126 , Y10T29/49149 , Y10T29/49155 , Y10T29/49165
Abstract: The present invention provides a ceramic substrate including: a ceramic stacked layer structure in which multiple ceramic layers are stacked to be interconnected through a via provided within each of the ceramic layers, the ceramic stacked layer structure having a hole provided therein to expose a top portion of the via provided within a ceramic layer of being a surface layer; a conductive material filled within the hole; and an external electrode formed on the surface of the ceramic stacked layer structure so that the external electrode is electrically connected to the conductive material, and a manufacturing method thereof.
Abstract translation: 本发明提供一种陶瓷基板，其特征在于，包括：陶瓷层叠体，其中多个陶瓷层通过设置在各陶瓷层内的通孔进行层叠而互连，所述陶瓷层叠体结构具有设置在其内的孔， 位于作为表层的陶瓷层内的通孔; 填充在孔内的导电材料; 以及外部电极，其形成在陶瓷层叠结构的表面上，使得外部电极与导电材料电连接，及其制造方法。
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公开(公告)号：US20100096178A1
公开(公告)日：2010-04-22
申请号：US12478524
申请日：2009-06-04
Applicant: Jin Waun KIM , Seung Gyo Jeong
Inventor： Jin Waun KIM , Seung Gyo Jeong
CPC classification number: H05K3/4061 , H05K1/0306 , H05K3/4629 , H05K2201/09454 , H05K2201/096 , H05K2201/09909 , Y10T29/49163
Abstract: A non-shrinkage ceramic substrate includes: a ceramic laminated body formed by laminating a plurality of green sheets; an electrode part including a via electrode penetratingly formed at the ceramic laminated body and an outer electrode formed on a surface of the ceramic laminated body and electrically connected with the via electrode; and an interface part formed between the ceramic laminated body and the electrode part to prevent an electrical connection between the electrodes from weakening.
Abstract translation: 非收缩陶瓷基板包括：通过层压多个生片形成的陶瓷层叠体; 包括在陶瓷层叠体上贯通地形成的通孔电极的电极部件和形成在陶瓷层叠体的表面并与通孔电极电连接的外部电极; 以及形成在陶瓷层叠体和电极部之间的界面部，以防止电极之间的电连接变弱。
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