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公开(公告)号：US07926154B2
公开(公告)日：2011-04-19
申请号：US12271428
申请日：2008-11-14
Applicant: Ki Pyo Hong , Byeung Gyu Chang , Ji Hwan Shin , Gyu Man Hwang
Inventor： Ki Pyo Hong , Byeung Gyu Chang , Ji Hwan Shin , Gyu Man Hwang
IPC: H01G7/00
CPC classification number: H01G4/30 , H01G4/1227 , Y10T29/417 , Y10T29/43 , Y10T29/435 , Y10T29/49165 , Y10T29/49169
Abstract: There is provided a method of manufacturing a multi-layer ceramic condenser. A method of manufacturing a multi-layer ceramic condenser may include: laminating a plurality of dielectric green sheets having internal electrodes formed thereon to form a laminate; forming through holes in a region of the laminate where an external electrode is to be formed; filling the through holes with conductive paste to form the external electrode; cutting the laminate having the external electrode formed thereon; and firing the cut laminate to form at least one multi-layer ceramic condenser.
Abstract translation: 提供一种制造多层陶瓷冷凝器的方法。 制造多层陶瓷电容器的方法可以包括：层压多个形成有内部电极的电介质生片以形成层压体; 在要形成外部电极的层压体的区域中形成通孔; 用导电膏填充通孔以形成外部电极; 切割其上形成有外部电极的层压体; 并烧制切割的层压体以形成至少一层多层陶瓷冷凝器。
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公开(公告)号：US20110079420A1
公开(公告)日：2011-04-07
申请号：US12591735
申请日：2009-11-30
Applicant: Myung Whun CHANG , Dae Hyeong LEE , Ki Pyo HONG , Jin Waun KIM
Inventor： Myung Whun CHANG , Dae Hyeong LEE , Ki Pyo HONG , Jin Waun KIM
CPC classification number: H05K3/4061 , B32B18/00 , C04B35/645 , C04B2237/343 , C04B2237/348 , C04B2237/62 , C04B2237/68 , H05K3/4629 , H05K2201/0352 , H05K2201/096 , Y10T29/49117 , Y10T29/49204
Abstract: The present invention provides a multi-layered ceramic substrate including a first insulating sheet having a first via contact; and a second insulating sheet joined to the first insulating sheet, wherein the second insulating sheet has a second via contact aligned with the first via contact up and down to be joined to the first via contact, wherein the first via contact has a form extended to the inside of the second via contact.
Abstract translation: 本发明提供一种多层陶瓷基板，其包括具有第一通孔接点的第一绝缘片; 以及与所述第一绝缘片接合的第二绝缘片，其中所述第二绝缘片具有与所述第一通孔接触件对准的第二通孔接触件，所述第二通孔接触件被上下连接以连接到所述第一通孔接头，其中所述第一通孔接头具有延伸到 第二通孔接触件的内部。
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3.发明授权Method of manufacturing capacitor-embedded low temperature co-fired ceramic substrate 失效制造电容器嵌入式低温共烧陶瓷基板的方法公开(公告)号：US07703198B2
公开(公告)日：2010-04-27
申请号：US11819897
申请日：2007-06-29
Applicant: Seung Gyo Jeong , Yong Seok Choi , Ki Pyo Hong
Inventor： Seung Gyo Jeong , Yong Seok Choi , Ki Pyo Hong
CPC classification number: H01G4/30 , H01G4/232 , H01L2224/48091 , H01L2924/01019 , H01L2924/09701 , H01L2924/30107 , H05K1/0231 , H05K1/0306 , H05K1/162 , H05K1/186 , H05K3/4611 , H05K3/4629 , H05K3/4688 , H05K2201/09672 , H05K2201/10636 , Y02P70/611 , Y10T29/417 , Y10T29/43 , Y10T29/435 , Y10T29/49117 , Y10T29/4913 , Y10T29/49155 , Y10T29/49165 , H01L2924/00014 , H01L2924/00
Abstract: A method of manufacturing a capacitor-embedded low temperature co-fired ceramic substrate. A capacitor part is manufactured by firing a deposition including at least one high dielectric ceramic sheet to form a capacitor part. A plurality of low temperature co-fired green sheets are provided. Each of the low temperature co-fired green sheet has at least one of a conductive pattern and a conductive via hole thereon. A low temperature co-fired ceramic deposition is formed by depositing the low temperature co-fired green sheets to embed the capacitor part in the low temperature co-fired ceramic deposition. The embedded capacitor part is connected either to the conductive pattern or the conductive via hole of an adjacent green sheet. Then the low temperature co-fired ceramic deposition having the capacitor part embedded therein is fired.
Abstract translation: 一种制造电容器嵌入式低温共烧陶瓷基板的方法。 通过烧结包括至少一个高介电陶瓷片的沉积来形成电容器部分来制造电容器部分。 提供多个低温共烧生片。 每个低温共烧生片具有导电图案和导电通孔中的至少一个。 通过沉积低温共烧生片将电容器部分嵌入低温共烧陶瓷沉积中来形成低温共烧陶瓷沉积。 嵌入式电容器部分连接到相邻生片的导电图案或导电通孔。 然后烧结具有嵌入其中的电容器部分的低温共烧陶瓷沉积。
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公开(公告)号：US20090126174A1
公开(公告)日：2009-05-21
申请号：US12271428
申请日：2008-11-14
Applicant: Ki Pyo Hong , Byeung Gyu Chang , Ji Hwan Shin , Gyu Man Hwang
Inventor： Ki Pyo Hong , Byeung Gyu Chang , Ji Hwan Shin , Gyu Man Hwang
IPC: H01G4/00
CPC classification number: H01G4/30 , H01G4/1227 , Y10T29/417 , Y10T29/43 , Y10T29/435 , Y10T29/49165 , Y10T29/49169
Abstract: There is provided a method of manufacturing a multi-layer ceramic condenser. A method of manufacturing a multi-layer ceramic condenser may include: laminating a plurality of dielectric green sheets having internal electrodes formed thereon to form a laminate; forming through holes in a region of the laminate where an external electrode is to be formed; filling the through holes with conductive paste to form the external electrode; cutting the laminate having the external electrode formed thereon; and firing the cut laminate to form at least one multi-layer ceramic condenser.
Abstract translation: 提供一种制造多层陶瓷冷凝器的方法。 制造多层陶瓷电容器的方法可以包括：层压多个形成有内部电极的电介质生片以形成层压体; 在要形成外部电极的层压体的区域中形成通孔; 用导电膏填充通孔以形成外部电极; 切割其上形成有外部电极的层压体; 并烧制切割的层压体以形成至少一层多层陶瓷冷凝器。
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5.发明授权Plasma display panel with display electrodes formed in intersecting portions 失效等离子显示面板，其显示电极形成在交叉部分公开(公告)号：US07474052B2
公开(公告)日：2009-01-06
申请号：US11194473
申请日：2005-08-02
Applicant: Sung Yeol Park , Byeung Gyu Chang , Ki Pyo Hong
Inventor： Sung Yeol Park , Byeung Gyu Chang , Ki Pyo Hong
IPC: H01J17/49
CPC classification number: H01J11/32 , H01J11/16 , H01J2211/326 , H01J2211/365
Abstract: Provided herein is a plasma display panel. The plasma display panel comprises a front substrate, a rear substrate opposite to the front substrate and having address electrodes formed thereon, a lattice-shaped partition wall formed between the front substrate and the rear substrate, a phosphor applied to a discharge space partitioned by the partition wall, and a plurality of scanning electrodes and common electrodes formed in intersection regions of the partition wall and extending perpendicular to the front substrate. The plasma display panel has a sufficient aperture ratio, and thus has enhanced light emitting efficiency. The scanning electrodes and the common electrodes formed in the intersection regions of the partition walls have a vertical construction, thereby effectively preventing the phosphor from being damaged by the plasma. Discharge uniformly occurs at the outer periphery of the discharge cell, thereby inducing effective excitation of the phosphor.
Abstract translation: 本文提供了等离子体显示面板。 等离子体显示面板包括前基板，与前基板相对的后基板，其上形成有寻址电极，形成在前基板和后基板之间的格子状分隔壁，施加到由该基板分隔开的放电空间的荧光体 分隔壁，以及形成在分隔壁的交叉区域并垂直于前基板延伸的多个扫描电极和公共电极。 等离子体显示面板具有足够的开口率，因此具有增强的发光效率。 形成在隔壁的交叉区域中的扫描电极和公共电极具有垂直结构，从而有效地防止了荧光体被等离子体损坏。 在放电单元的外周均匀地发生放电，从而引起荧光体的有效激发。
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Patent Agency Ranking
公开(公告)号：US08806731B2
公开(公告)日：2014-08-19
申请号：US12987697
申请日：2011-01-10
Applicant: Myung Whun Chang , Dae Hyeong Lee , Ki Pyo Hong
Inventor： Myung Whun Chang , Dae Hyeong Lee , Ki Pyo Hong
IPC: B23P6/00
CPC classification number: H05K1/11 , G01R1/02 , H05K1/09 , H05K3/225 , H05K3/4015 , H05K3/4061 , Y10T29/49002 , Y10T29/49149 , Y10T29/49165 , Y10T29/49726 , Y10T29/49748
Abstract: There is provided a method of repairing a probe board, the method including: preparing a plurality of first via electrodes filled with a first filling material in a board body formed as a ceramic sintered body; forming a via hole for an open via electrode among the plurality of first via electrodes; filling the via hole with a second filling material having a lower sintering temperature than that of the first filling material; and forming a second via electrode by sintering the second filling material. The open via repair according to the present invention improves the manufacturing yield of the board and reduces the manufacturing costs thereof.
Abstract translation: 提供了一种修复探针板的方法，所述方法包括：在形成为陶瓷烧结体的板体中制备多个填充有第一填充材料的第一通孔电极; 在所述多个第一通孔电极中形成用于开放通孔电极的通孔; 用具有比第一填充材料低的烧结温度的第二填充材料填充通孔; 以及通过烧结所述第二填充材料形成第二通孔电极。 根据本发明的开放通孔修复提高了板的制造成品率并降低了其制造成本。
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7.发明申请PROBE PIN, PROBE CARD USING THE PROBE PIN, AND METHOD OF MANUFACTURING THE PROBE CARD 审中-公开探针，使用探针的探针卡和制造探针卡的方法公开(公告)号：US20130162278A1
公开(公告)日：2013-06-27
申请号：US13532475
申请日：2012-06-25
Applicant: Doo Yun CHUNG , Dae Hyeong Lee , Ki Pyo Hong , Won Chul Ma , Yong Seok Choi
Inventor： Doo Yun CHUNG , Dae Hyeong Lee , Ki Pyo Hong , Won Chul Ma , Yong Seok Choi
CPC classification number: G01R3/00 , B23K1/0008 , B23K3/0638 , B23K26/382 , B23K26/40 , B23K35/0222 , B23K35/262 , B23K35/3006 , B23K2101/42 , B23K2103/16 , B23K2103/50 , G01R1/06727 , G01R1/07357
Abstract: There is provided a probe card, including: a substrate having a plurality of grooves formed in one surface thereof; and at least one probe pin having a plurality of substrate combining protrusions formed on one surface thereof and corresponding to the plurality of grooves, the plurality of substrate combining protrusions having heights corresponding to the plurality of grooves.
Abstract translation: 提供了一种探针卡，包括：具有形成在其一个表面中的多个凹槽的基底; 以及至少一个探针，其具有在其一个表面上形成并对应于所述多个凹槽的多个基板组合突起，所述多个基板组合突起具有与所述多个凹槽对应的高度。
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公开(公告)号：US20130000958A1
公开(公告)日：2013-01-03
申请号：US13473047
申请日：2012-05-16
Applicant: Yong Seok CHOI , Dae Hyeong Lee , Won Chul Ma , Ki Pyo Hong
Inventor： Yong Seok CHOI , Dae Hyeong Lee , Won Chul Ma , Ki Pyo Hong
CPC classification number: H01L23/15 , B32B18/00 , B82Y30/00 , C04B37/006 , C04B2235/408 , C04B2235/616 , C04B2237/125 , C04B2237/32 , C04B2237/562 , C04B2237/62 , H01L21/4857 , H01L2924/0002 , H05K1/113 , H05K3/4061 , H05K3/4629 , H05K2203/025 , H05K2203/072 , H01L2924/00
Abstract: Disclosed herein are a multilayer ceramic substrate and a method for manufacturing the same. In a method for manufacturing the multilayer ceramic substrate, which has a ceramic laminate including multiple ceramic layers and allowing interconnection between layers through vias respectively formed in the multiple ceramic layers, the method includes: preparing a ceramic laminate in which a void is formed around a via in at least one ceramic layer of multiple ceramic layers; immersing the ceramic laminate in a precipitating bath in which an electrode solution is contained; putting the ceramic laminate out of the precipitating bath after a predetermined period of time, and then removing a nanoparticle film stacked on a surface of a multilayer ceramic substrate; and applying heat to the multilayer ceramic substrate to form nanoparticles filling an inside of the void, after the removing of the nanoparticle film.
Abstract translation: 本文公开了多层陶瓷基板及其制造方法。 在具有陶瓷层叠体的多层陶瓷基板的制造方法中，所述多层陶瓷基板具有包含多个陶瓷层的陶瓷层叠体，并且能够通过分别形成在多个陶瓷层中的通孔的层间的相互连接，所述方法包括：准备陶瓷层叠体， 在多个陶瓷层的至少一个陶瓷层中通孔; 将陶瓷层压体浸渍在其中含有电极溶液的沉淀浴中; 在预定时间后将陶瓷层压体放出沉淀池，然后除去堆叠在多层陶瓷基板的表面上的纳米颗粒膜; 并且在除去纳米颗粒膜之后，向多层陶瓷基板施加热量以形成填充空隙内部的纳米颗粒。
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9.发明申请METHOD FOR MANUFACTURING CERAMIC SUBSTRATE AND CERAMIC SUBSTRATE USING THE SAME 审中-公开使用其制造陶瓷基板和陶瓷基板的方法公开(公告)号：US20120040125A1
公开(公告)日：2012-02-16
申请号：US13017924
申请日：2011-01-31
Applicant: Myung Whun CHANG , Dae Hyeong LEE , Ki Pyo HONG
Inventor： Myung Whun CHANG , Dae Hyeong LEE , Ki Pyo HONG
CPC classification number: C04B41/52 , C04B41/009 , C04B41/89 , C04B2111/00844 , H05K3/22 , H05K3/4629 , H05K2203/025 , Y10T428/20 , C04B35/00 , C04B41/4539 , C04B41/4572 , C04B41/5022 , C04B41/5031
Abstract: A method for manufacturing a ceramic substrate, and a ceramic substrate using the same are disclosed. The method for manufacturing a ceramic substrate includes: forming a first adhesive layer on a blister formed on a substrate; filling the blister having the first adhesive layer formed thereon with a filler; and hardening the ceramic substrate. A blister formed on the ceramic substrate can be removed to make the substrate have a smooth surface, thus improving reliability.
Abstract translation: 公开了陶瓷基板的制造方法和使用该方法的陶瓷基板。 陶瓷基板的制造方法包括：在形成在基板上的泡罩上形成第一粘接层; 用填料填充其上形成有第一粘合剂层的泡罩; 并使陶瓷基板硬化。 可以除去形成在陶瓷基板上的泡罩，使基板具有光滑的表面，从而提高可靠性。
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公开(公告)号：US20120037408A1
公开(公告)日：2012-02-16
申请号：US12987697
申请日：2011-01-10
Applicant: Myung Whun CHANG , Dae Hyeong LEE , Ki Pyo HONG
Inventor： Myung Whun CHANG , Dae Hyeong LEE , Ki Pyo HONG
CPC classification number: H05K1/11 , G01R1/02 , H05K1/09 , H05K3/225 , H05K3/4015 , H05K3/4061 , Y10T29/49002 , Y10T29/49149 , Y10T29/49165 , Y10T29/49726 , Y10T29/49748
Abstract: There is provided a method of repairing a probe board, the method including: preparing a plurality of first via electrodes filled with a first filling material in a board body formed as a ceramic sintered body; forming a via hole for an open via electrode among the plurality of first via electrodes; filling the via hole with a second filling material having a lower sintering temperature than that of the first filling material; and forming a second via electrode by sintering the second filling material. The open via repair according to the present invention improves the manufacturing yield of the board and reduces the manufacturing costs thereof.
Abstract translation: 提供了一种修复探针板的方法，所述方法包括：在形成为陶瓷烧结体的板体中制备多个填充有第一填充材料的第一通孔电极; 在所述多个第一通孔电极中形成用于开放通孔电极的通孔; 用具有比第一填充材料低的烧结温度的第二填充材料填充通孔; 以及通过烧结所述第二填充材料形成第二通孔电极。 根据本发明的开放通孔修复提高了板的制造成品率并降低了其制造成本。
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