Abstract:
A bicycle carrier includes a main shaft having a spacer, two upper stands mounted on the main shaft and abutting the spacer, two carrying racks mounted on the main shaft and respectively abutting the upper stands, two lower stands mounted on the main shaft and respectively abutting the carrying racks, and two end caps mounted on the main shaft and respectively abutting the lower stands. The spacer has two ends each provided with a first ratchet ring. Each of the upper stands has a first mounting ring which has two ends each provided with a second ratchet ring. Each of the carrying racks has a second mounting ring which has two ends each provided with a third ratchet ring. Each of the lower stands has a third mounting ring which has two ends each provided with a fourth ratchet ring.
Abstract:
A fixing mount of a bicycle carrier contains a support rod of a bicycle carrier, a body, at least one cable tie, a connector, and a retainer. The body includes a large-diameter end, a through hole, and a small-diameter end. The large-diameter end has a first arcuate supporting face, a second arcuate supporting face and a third arcuate supporting face. The small-diameter end has a locking groove, and the body also includes plural locking elements. The connector includes a recess, a convex bottom surface, two coupling tabs, and each coupling tab has a concaved top surface and an aperture. The connector further includes plural first extending pieces, and each first extending piece has a first pore. Between any two adjacent extending blocks is defined a notch. The retainer includes at least one second extending piece and a plurality of pegs, and each extending piece has a second pore.
Abstract:
Semiconductor devices with air gaps around the through-silicon via are formed. Embodiments include forming a first cavity in a substrate, filling the first cavity with a sacrificial material, forming a second cavity in the substrate, through the sacrificial material, by removing a portion of the sacrificial material and a portion of the substrate below the sacrificial material, filling the second cavity with a conductive material, removing a remaining portion of the sacrificial material to form an air gap between the conductive material and the substrate, and forming a cap over the air gap.
Abstract:
Semiconductor devices with through silicon vias (TSVs) are formed without copper contamination. Embodiments include exposing a passivation layer surrounding a bottom portion of a TSV in a silicon substrate, forming a silicon composite layer over the exposed passivation layer and over a bottom surface of the silicon substrate, forming a hardmask layer over the silicon composite layer and over the bottom surface of the silicon substrate, removing a section of the silicon composite layer around the bottom portion of the TSV using the hardmask layer as a mask, re-exposing the passivation layer, and removing the hardmask layer and the re-exposed passivation layer to expose a contact for the bottom portion of the TSV.
Abstract:
A vertical light emitting diode (VLED) die includes an epitaxial structure having a first-type confinement layer, an active layer on the first-type confinement layer configured as a multiple quantum well (MQW) configured to emit light, and a second-type confinement layer having a roughened surface. In a first embodiment, the roughened surface includes a pattern of holes with a depth (d) in a major surface thereof surrounded by a pattern of protuberances with a height (h) on the major surface. In a second embodiment, the roughened surface includes a pattern of primary protuberances surrounded by a pattern of secondary protuberances.
Abstract:
A method for forming a device is disclosed. A substrate having first and second major surfaces is provided. A stress buffer is formed in the substrate. A through silicon via (TSV) contact is formed between the stress buffer. The stress buffer has a depth less than a depth of the TSV contact. The stress buffer alleviates stress created by the difference in coefficient thermal expansion (CTE) between the TSV contact and the substrate.
Abstract:
A lighting device comprising LEDs with phosphor layers includes a plurality of LED sets which can emit light with a peak emission wavelength between 360 nm and 490 nm; and a plurality of sets of phosphor layers covering the corresponding LED sets among the plurality of LED sets. At least two of the plurality of LED sets respectively have peak emission wavelength different from each other. The dominant fluorescence wavelength of at least one of the plurality of sets of phosphor layers ranges from 500 nm to 580 nm, and the dominant fluorescence wavelength of at least one of the other sets of phosphor layers ranges from 590 nm to 650 nm.
Abstract:
Methods of deducing oxide thickness using calculated and measured scattering spectra are provided. Embodiments include depositing an oxide over a semiconductor wafer, reducing the oxide from a portion of the semiconductor wafer, and deducing a thickness of oxide remaining at a location within the portion using scatterometric metrology. Embodiments further include deducing the thickness by: calculating scattering spectra for a plurality of oxide thicknesses, producing calculated scattering spectra, monitoring scattering spectra at the location within the portion of the semiconductor wafer, comparing the monitored scattering spectra at the location to the calculated scattering spectra, determining a closest matching calculated scattering spectra to the monitored scattering spectra at the location, and obtaining an oxide thickness corresponding to the closest matching calculated scattering spectra.
Abstract:
An electrode structure of a vanadium redox flow battery is disclosed, which includes a proton-exchange membrane, two graphite papers, two graphite felt units, two pads, two graphite polar plates, two metal plates and a lock-fixing device which are symmetrically stacked in sequence from center to outside. wherein each graphite polar plate has the flow channels with a grooved structure, and each graphite felt unit is embedded in the flow channels of one of the graphite polar plates, and then the graphite felt units are covered by the graphite papers such that the different electrolytes flow in their corresponding flow channels. The storage tanks of vanadium electrolyte are connected through the connection pipelines, and the redox reaction is performed through the flows of the vanadium electrolyte. The electrode structure of the vanadium redox flow battery can be stacked for forming a large-scale electrode structure to increase the electrical power.
Abstract:
Techniques for fabricating metal devices, such as vertical light-emitting diode (VLED) devices, power devices, laser diodes, and vertical cavity surface emitting laser devices, are provided. Devices produced accordingly may benefit from greater yields and enhanced performance over conventional metal devices, such as higher brightness of the light-emitting diode and increased thermal conductivity. Moreover, the invention discloses techniques in the fabrication arts that are applicable to GaN-based electronic devices in cases where there is a high heat dissipation rate of the metal devices that have an original non-(or low) thermally conductive and/or non-(or low) electrically conductive carrier substrate that has been removed.