公开(公告)号：US08178790B2

公开(公告)日：2012-05-15

申请号：US12336697

申请日：2008-12-17

Applicant: Toshiki Furutani ,  Atsushi Sakai ,  Kiyohisa Hasegawa ,  Hiroshi Segawa ,  Shuichi Kawano ,  Hajime Sakamoto

Inventor： Toshiki Furutani ,  Atsushi Sakai ,  Kiyohisa Hasegawa ,  Hiroshi Segawa ,  Shuichi Kawano ,  Hajime Sakamoto

IPC: H05K1/11

CPC classification number: H01L23/49822 ,  H01L23/49816 ,  H01L23/49827 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2924/01004 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15192 ,  H01L2924/19107

Abstract: An interposer and a method of manufacturing the same are provided. The interposer includes a substrate and a conductor portion formed inside the substrate. At least one insulating layer is formed on the substrate and on the conductor portion. A signal wiring portion is formed inside the insulating layer or on the insulating layer. A first pad is configured to receive an electronic part, and is formed on an outermost insulating layer of the at least one insulating layer. A connection conductor is formed in the at least one insulating layer so as to electrically connect the conductor portion to the first pad.

Abstract translation: 提供了插入件及其制造方法。 内插件包括基板和形成在基板内部的导体部分。 在基板上和导体部分上形成至少一个绝缘层。 在绝缘层内或绝缘层上形成信号布线部分。 第一焊盘被配置为接收电子部件，并且形成在所述至少一个绝缘层的最外绝缘层上。 连接导体形成在所述至少一个绝缘层中，以便将导体部分电连接到第一焊盘。

公开(公告)号：US07415761B2

公开(公告)日：2008-08-26

申请号：US10356464

申请日：2003-02-03

Applicant: Naohiro Hirose ,  Kouta Noda ,  Hiroshi Segawa ,  Honjin En ,  Kiyotaka Tsukada ,  Naoto Ishida ,  Kouji Asano ,  Atsushi Shouda

Inventor： Naohiro Hirose ,  Kouta Noda ,  Hiroshi Segawa ,  Honjin En ,  Kiyotaka Tsukada ,  Naoto Ishida ,  Kouji Asano ,  Atsushi Shouda

IPC: H01K3/10

CPC classification number: H05K3/4652 ,  B23K26/389 ,  H01L2224/16225 ,  H01L2924/15174 ,  H01L2924/15311 ,  H05K1/0201 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/0038 ,  H05K3/0055 ,  H05K3/0094 ,  H05K3/108 ,  H05K3/28 ,  H05K3/381 ,  H05K3/383 ,  H05K3/384 ,  H05K3/427 ,  H05K3/4602 ,  H05K3/4623 ,  H05K3/4661 ,  H05K2201/0195 ,  H05K2201/0352 ,  H05K2201/0358 ,  H05K2201/062 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/09827 ,  H05K2201/09863 ,  H05K2201/09881 ,  H05K2203/0307 ,  H05K2203/0353 ,  H05K2203/0554 ,  H05K2203/0773 ,  H05K2203/107 ,  H05K2203/121 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

Abstract: An opening is formed in resin 20 by a laser beam so that a via hole is formed. At this time, copper foil 22, the thickness of which is reduced (to 3 μm) by performing etching to lower the thermal conductivity is used as a conformal mask. Therefore, an opening 20a can be formed in the resin 20 if the number of irradiation of pulse-shape laser beam is reduced. Therefore, occurrence of undercut of the resin 20 which forms an interlayer insulating resin layer can be prevented. Thus, the reliability of the connection of the via holes can be improved.

Abstract translation: 通过激光束在树脂20中形成开口，从而形成通孔。 此时，通过进行蚀刻来降低导热率的铜箔22的厚度（3μm）被用作保形掩模。 因此，如果脉冲形激光束的照射次数减少，则可以在树脂20中形成开口部20a。 因此，可以防止形成层间绝缘树脂层的树脂20的底切的发生。 因此，可以提高通孔连接的可靠性。

公开(公告)号：US06708246B1

公开(公告)日：2004-03-16

申请号：US09692041

申请日：2000-10-20

Applicant: Kazuya Ishihara ,  Hiroshi Segawa

Inventor： Kazuya Ishihara ,  Hiroshi Segawa

IPC: G06F100

CPC classification number: G06F9/3879

Abstract: A signal processing device includes an integrated processor, a video processing unit coding a video signal, and an interface controlling a bus ownership between the integrated processor and an external processor. The interface detects the integrated processor accessing an external device and asserts a bus request. Thus the signal processing device can process data with a shorter cycle and thus more efficiently.

Abstract translation: 信号处理装置包括集成处理器，编码视频信号的视频处理单元以及控制集成处理器与外部处理器之间的总线所有权的接口。 该接口检测集成处理器访问外部设备并断言总线请求。 因此，信号处理设备可以以更短的周期处理数据，从而更有效地处理数据。

公开(公告)号：US06591495B2

公开(公告)日：2003-07-15

申请号：US09797916

申请日：2001-03-05

Applicant: Naohiro Hirose ,  Kouta Noda ,  Hiroshi Segawa ,  Honjin En ,  Kiyotaka Tsukada ,  Naoto Ishida ,  Kouji Asano ,  Atsushi Shouda

Inventor： Naohiro Hirose ,  Kouta Noda ,  Hiroshi Segawa ,  Honjin En ,  Kiyotaka Tsukada ,  Naoto Ishida ,  Kouji Asano ,  Atsushi Shouda

IPC: H05K302

CPC classification number: H05K3/4652 ,  B23K26/389 ,  H01L2224/16225 ,  H01L2924/15174 ,  H01L2924/15311 ,  H05K1/0201 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/0038 ,  H05K3/0055 ,  H05K3/0094 ,  H05K3/108 ,  H05K3/28 ,  H05K3/381 ,  H05K3/383 ,  H05K3/384 ,  H05K3/427 ,  H05K3/4602 ,  H05K3/4623 ,  H05K3/4661 ,  H05K2201/0195 ,  H05K2201/0352 ,  H05K2201/0358 ,  H05K2201/062 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/09827 ,  H05K2201/09863 ,  H05K2201/09881 ,  H05K2203/0307 ,  H05K2203/0353 ,  H05K2203/0554 ,  H05K2203/0773 ,  H05K2203/107 ,  H05K2203/121 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

Abstract: An opening is formed in resin by a laser beam so that a via hole is formed. Copper foil, the thickness of which is reduced to 3 &mgr;m by etching to lower the thermal conductivity, is used as a conformal mask. Therefore, an opening is formed in the resin and the number of irradiation of pulse-shape laser beam is reduced. Thus, occurence of undercut of the resin, which forms an interlayer insulating resin layer, can be prevented and the reliability of the connection of the via holes can be improved.

Abstract translation: 通过激光束在树脂中形成开口，从而形成通孔。 铜箔的厚度通过蚀刻减少到3μm，以降低导热率，被用作保形掩模。 因此，在树脂中形成开口，并且脉冲形状的激光束的照射次数减少。 因此，可以防止形成层间绝缘树脂层的树脂的底切的发生，并且可以提高通孔的连接的可靠性。

公开(公告)号：US06376052B1

公开(公告)日：2002-04-23

申请号：US09556860

申请日：2000-04-21

Applicant: Motoo Asai ,  Ken-ichi Shimada ,  Kouta Noda ,  Takashi Kariya ,  Hiroshi Segawa

Inventor： Motoo Asai ,  Ken-ichi Shimada ,  Kouta Noda ,  Takashi Kariya ,  Hiroshi Segawa

IPC: B32B300

CPC classification number: B32B3/00 ,  H05K3/0094 ,  H05K3/383 ,  H05K3/384 ,  H05K3/385 ,  H05K3/4069 ,  H05K3/4602 ,  H05K2201/0209 ,  H05K2201/0212 ,  H05K2201/0215 ,  H05K2201/0257 ,  H05K2201/0347 ,  H05K2201/09536 ,  H05K2201/09563 ,  H05K2201/0959 ,  H05K2201/096 ,  Y10S428/901 ,  Y10T428/24917

Abstract: A multilayer printed wiring board is composed of a substrate provided with through-holes, and a wiring board formed on the substrate through the interposition of an interlaminar insulating resin layer, the through-holes having a roughened internal surface and being filled with a filler, an exposed part of the filler in the through-holes being covered with a through-hole-covering conductor layer, and a viahole formed just thereabove being connected to the through-hole-covering conductor layer. Without peeling between the through-holes and the filler, this wiring board has a satisfactory connection reliability between the through-holes and the internal layer circuit and provides a high density wiring.

Abstract translation: 多层印刷布线板由设置有通孔的基板和通过插入层间绝缘树脂层而形成在基板上的布线板，所述通孔具有粗糙的内表面并填充有填料， 通孔中的填充物的暴露部分被覆盖有通孔覆盖导体层，并且形成在其上方的通孔连接到通孔覆盖导体层。在通孔和 填充物，该布线板在通孔和内层电路之间具有令人满意的连接可靠性，并且提供高密度布线。

公开(公告)号：US06376049B1

公开(公告)日：2002-04-23

申请号：US09341689

申请日：1999-07-23

Applicant: Motoo Asai ,  Kenichi Shimada ,  Kouta Noda ,  Takashi Kariya ,  Hiroshi Segawa

Inventor： Motoo Asai ,  Kenichi Shimada ,  Kouta Noda ,  Takashi Kariya ,  Hiroshi Segawa

IPC: B32B300

CPC classification number: B32B3/00 ,  H05K3/0094 ,  H05K3/383 ,  H05K3/384 ,  H05K3/385 ,  H05K3/4069 ,  H05K3/4602 ,  H05K2201/0209 ,  H05K2201/0212 ,  H05K2201/0215 ,  H05K2201/0257 ,  H05K2201/0347 ,  H05K2201/09536 ,  H05K2201/09563 ,  H05K2201/0959 ,  H05K2201/096 ,  Y10S428/901 ,  Y10T428/24917

Abstract: A multilayer printed wiring board is composed of a substrate provided with through-holes, and a wiring board formed on the substrate through the interposition of an interlaminar insulating resin layer, the through-holes having a roughened internal surface and being filled with a filler, an exposed part of the filler in the through-holes being covered with a through-hole-covering conductor layer, and a viahole formed just thereabove being connected to the through-hole-covering conductor layer. Without peeling between the through-holes and the filler, this wiring board has a satisfactory connection reliability between the through-holes and the internal layer circuit and provides a high density wiring.

Abstract translation: 多层印刷布线板由设置有通孔的基板和通过插入层间绝缘树脂层而形成在基板上的布线板，所述通孔具有粗糙的内表面并填充有填料， 通孔中的填充物的暴露部分被覆盖有通孔覆盖导体层，并且形成在其上方的通孔连接到通孔覆盖导体层。 在通孔和填料之间不剥离，该布线板在通孔和内层电路之间具有令人满意的连接可靠性，并提供高密度布线。

公开(公告)号：US6141451A

公开(公告)日：2000-10-31

申请号：US982427

申请日：1997-12-02

Applicant: Satoshi Kumaki ,  Tetsuya Matsumura ,  Hiroshi Segawa ,  Kazuya Ishihara ,  Yoshinori Matsuura ,  Atsuo Hanami

Inventor： Satoshi Kumaki ,  Tetsuya Matsumura ,  Hiroshi Segawa ,  Kazuya Ishihara ,  Yoshinori Matsuura ,  Atsuo Hanami

IPC: H04N19/50 ,  G06T9/00 ,  H03M7/36 ,  H04N19/42 ,  H04N19/423 ,  H04N19/46 ,  H04N19/503 ,  H04N19/51 ,  H04N19/61 ,  H04N19/625 ,  H04N19/70 ,  H04N19/80 ,  H04N19/87 ,  H04N19/91 ,  G06K9/36

CPC classification number: G06T9/004

Abstract: Disclosed is an image coding method and apparatus for preventing a coding quantity of coding data from being increased when a redundancy between image planes is low. A selector outputs either an optimum motion vector output from a motion vector detecting device or a motion vector output from a motion vector storing section to a real time image coding device for performing coding on the basis of an evaluation value output from the motion vector detecting device. If it is decided, according to the evaluation value, that a redundancy between a reference image plane and a coding object image plane is low, the motion vector is selected so that the coding quantity of the coding data can be prevented from being increased.

Abstract translation: 公开了一种图像编码方法和装置，用于在图像平面之间的冗余度低时防止编码数据的编码量增加。 选择器输出从运动矢量检测装置输出的最佳运动矢量或从运动矢量存储部分输出的运动矢量到实时图像编码装置，用于根据从运动矢量检测装置输出的评估值进行编码 。 如果根据评估值确定参考图像平面和编码对象图像平面之间的冗余度低，则选择运动矢量，使得可以防止编码数据的编码量增加。

公开(公告)号：US4924314A

公开(公告)日：1990-05-08

申请号：US94648

申请日：1987-09-09

Applicant: Masahiko Yoshimoto ,  Hiroshi Segawa ,  Tetsuya Matsumura

Inventor： Masahiko Yoshimoto ,  Hiroshi Segawa ,  Tetsuya Matsumura

IPC: G06F12/16 ,  G06T1/00 ,  H04N17/00

CPC classification number: H04N17/00

Abstract: An integrated circuit 1 for video signal processing includes a 2-line memory 3, a video signal processing circuit 4 and a coincidence circuit 6. A digital video signal of 8 bits inputted to an input terminal group 2 is applied to the 2-line memory 3 and the coincidence circuit 6. Also, the 2-line delay signal of 8 bits outputted from the 2-line memory 3 is applied to the coincidence circuit 6. The coincidence circuit 6 determines coincidence or non-coincidence of the input digital video signal and the 2-line delay signal received and outputs the result of that determination through a coincidence output terminal. As a result, an operation of the 2-line memory 3 can be tested individually.

Abstract translation: 用于视频信号处理的集成电路1包括2行存储器3，视频信号处理电路4和符合电路6.输入到输入端子组2的8位数字视频信号被施加到2行存储器 此外，从2行存储器3输出的8位的2行延迟信号被施加到符合电路6.符合电路6确定输入数字视频信号的一致或非重合 并且接收到2行延迟信号，并通过一致输出端输出该确定的结果。 结果，可以单独测试2行存储器3的操作。

公开(公告)号：US09700065B2

公开(公告)日：2017-07-11

申请号：US12624453

申请日：2009-11-24

Applicant: Vesselin D. Miladinov ,  Cesar Carlos Elejalde ,  Jesse Kiefer ,  Bharat Jani ,  Kishor Kabse ,  Matthew Allan Beam ,  Allen Aldridge ,  Jianping Chao ,  Osamu Takita ,  Yuzuru Mitsui ,  Hiroshi Segawa

Inventor： Vesselin D. Miladinov ,  Cesar Carlos Elejalde ,  Jesse Kiefer ,  Bharat Jani ,  Kishor Kabse ,  Matthew Allan Beam ,  Allen Aldridge ,  Jianping Chao ,  Osamu Takita ,  Yuzuru Mitsui ,  Hiroshi Segawa

IPC: A23G3/54 ,  A23G4/20 ,  A23G3/34 ,  A23G3/20 ,  A23G4/04

CPC classification number: A23G4/20 ,  A23G3/0068 ,  A23G3/2015 ,  A23G3/54 ,  A23G4/043 ,  A23G4/046

Abstract: A dough-like confectionery material contains a solid particulate, a liquid, and a diffusion controller. The dough-like confectionery material is an effective replacement for panned coatings, and it can be applied to an edible substrate, such as candy or chewing gum to form a layered confection. Methods and apparatus for forming layered confections are also described.

公开(公告)号：US09066439B2

公开(公告)日：2015-06-23

申请号：US13483587

申请日：2012-05-30

Applicant: Hiroshi Segawa ,  Nobuyuki Naganuma ,  Michimasa Takahashi ,  Teruyuki Ishihara

Inventor： Hiroshi Segawa ,  Nobuyuki Naganuma ,  Michimasa Takahashi ,  Teruyuki Ishihara

IPC: H05K1/16 ,  H05K3/30 ,  H05K3/36 ,  H05K1/14 ,  H05K3/34

CPC classification number: H05K1/141 ,  H05K1/142 ,  H05K3/305 ,  H05K3/3452 ,  H05K3/368 ,  H05K2201/09972 ,  H05K2203/1189 ,  Y10T29/49126

Abstract: A wiring board has a first wiring board having a first solder-resist layer, a second wiring board connected to the first wiring board and positioned in a first opening portion formed in the first solder-resist layer of the first wiring board, and a third wiring board connected to the first wiring board and positioned in a second opening portion formed in the first solder-resist layer of the first wiring board such that the second wiring board and the third wiring board are on the same side of the first wiring board. The first opening portion of the first wiring board and the second opening portion of the first wiring board form either a common opening portion accommodating the second and third wiring boards in the first solder-resist layer or separate opening portions separately accommodating the second wiring board and the third wiring board in the first solder-resist layer.

Abstract translation: 布线基板具有第一布线基板，其具有第一阻焊层，第二布线基板与第一布线基板连接，位于形成于第一布线基板的第一阻焊层的第一开口部， 连接到第一布线板并且位于形成在第一布线板的第一阻焊层中的第二开口部分中，使得第二布线板和第三布线板位于第一布线板的同一侧。 第一布线板的第一开口部分和第一布线板的第二开口部分形成在第一阻焊层中容纳第二和第三布线板的公共开口部分或分离容纳第二布线板的单独开口部分， 第一阻焊层中的第三布线板。