公开(公告)号：US20150144953A1

公开(公告)日：2015-05-28

申请号：US14090327

申请日：2013-11-26

Applicant: DARRELL G. HILL ,  STEPHEN H. KILGORE ,  CRAIG A. GAW

Inventor： DARRELL G. HILL ,  STEPHEN H. KILGORE ,  CRAIG A. GAW

IPC: H01L29/40 ,  H01L29/66 ,  H01L29/778

CPC classification number: H01L29/402 ,  H01L29/2003 ,  H01L29/4958 ,  H01L29/4966 ,  H01L29/66462 ,  H01L29/7787

Abstract: An embodiment of a transistor includes a semiconductor substrate, spaced-apart source and drain electrodes coupled to the semiconductor substrate, a gate electrode coupled to the semiconductor substrate between the source and drain electrodes, a dielectric layer over the gate electrode and at least a portion of the semiconductor substrate, and a field plate structure over the dielectric layer, wherein the field plate structure includes a gold-containing material and one or more migration inhibiting materials.

Abstract translation: 晶体管的一个实施例包括半导体衬底，耦合到半导体衬底的间隔开的源电极和漏电极，耦合到源电极和漏电极之间的半导体衬底的栅电极，栅极上的电介质层和至少一部分 以及介电层上的场板结构，其中场板结构包括含金材料和一种或多种迁移抑制材料。

公开(公告)号：US5358880A

公开(公告)日：1994-10-25

申请号：US44787

申请日：1993-04-12

Applicant: Michael S. Lebby ,  Chan-Long Shieh ,  Craig A. Gaw

Inventor： Michael S. Lebby ,  Chan-Long Shieh ,  Craig A. Gaw

IPC: H01L33/00 ,  H01L33/40 ,  H01L33/42 ,  H01L21/265

CPC classification number: H01L33/42 ,  H01L33/0066 ,  H01L33/405 ,  Y10S438/977

Abstract: A method of manufacturing a closed cavity LED including forming, on a substrate, a short cavity LED with electrically conductive layers on opposite ends. Depositing a transparent conductive layer of material over one electrically conductive layer and affixing glass or a diamond film over the transparent conductive layer to define and protect a light output area. Removing the substrate and covering the top and sides of the cavity with dielectric material and contact metal. The metal being in contact with the transparent conductive layer and the other electrical contact layer. Thus, a reflector covers the cavity in all directions except the light output area to increase external efficiency.

Abstract translation: 一种制造封闭腔LED的方法，包括在衬底上形成在相对端上具有导电层的短腔LED。 在一个导电层上沉积材料的透明导电层，并将玻璃或金刚石膜固定在透明导电层上，以限定和保护光输出区域。 用介质材料和接触金属去除基板并覆盖空腔的顶部和侧面。 金属与透明导电层和另一个电接触层接触。 因此，除了光输出区域之外，反射器在所有方向上覆盖空腔以增加外部效率。

公开(公告)号：US5270245A

公开(公告)日：1993-12-14

申请号：US982525

申请日：1992-11-27

Applicant: Craig A. Gaw ,  Chan-Long Shieh

Inventor： Craig A. Gaw ,  Chan-Long Shieh

IPC: H01L21/306 ,  H01L33/00 ,  H01L33/02 ,  H01L33/38 ,  H01L33/40 ,  H01L21/20 ,  H01L21/203

CPC classification number: H01L33/38 ,  H01L21/30612 ,  H01L33/0062 ,  H01L2933/0016 ,  H01L33/02 ,  H01L33/40

Abstract: A method of forming a III-V semiconductor device (10, 20) utilizes a III-V semiconductor substrate (11) having a plurality of III-V semiconductor layers (12, 14, 15, 16, 17). A pattern layer ( 19, 24) is formed on the plurality of layers (12, 14, 15, 16, 17). The plurality of III-V semiconductor layers (12, 14, 15, 16, 17) is etched with an isotropic etch that does not etch the pattern layer (19, 24). The isotropic etch undercuts the pattern layer (19, 24) and exposes an area for forming ohmic contacts on the plurality of III-V semiconductor layers. The pattern layer (19, 24) is used as a mask while depositing ohmic contact material (22, 23, 28) onto the area for forming ohmic contacts.

Abstract translation: 形成III-V半导体器件（10,20）的方法利用具有多个III-V半导体层（12,14,15,16,17）的III-V半导体衬底（11）。 在多个层（12,14,15,16,17）上形成图形层（19,24）。 通过不蚀刻图案层（19,24）的各向同性蚀刻蚀刻多个III-V半导体层（12,14,15,16,17）。 各向同性蚀刻使图案层（19,24）下切，并在多个III-V半导体层上露出用于形成欧姆接触的区域。 将图形层（19,24）用作掩模，同时将欧姆接触材料（22,23,28）沉积在用于形成欧姆接触的区域上。

公开(公告)号：US5237633A

公开(公告)日：1993-08-17

申请号：US791708

申请日：1991-11-14

Applicant: Craig A. Gaw ,  Paige M. Holm ,  Kwong-Han H. Leung ,  George W. Rhyne ,  Daniel L. Rode

Inventor： Craig A. Gaw ,  Paige M. Holm ,  Kwong-Han H. Leung ,  George W. Rhyne ,  Daniel L. Rode

IPC: H04B10/12 ,  H05B33/08

CPC classification number: H05B33/0818 ,  H05B33/0803

Abstract: A monolithic optoelectronic integrated circuit having an optical emission portion (18) and a drive portion (11, or 22 and 21). The drive portion is capable of accepting TTL and standard CMOS logic voltage levels. In a first embodiment, the monolithic optoelectronic integrated circuit (10) has a light emitting diode (18) driven by a dual gate FET (11). In a second embodiment, the monolithic optoelectronic integrated circuit (20) has a light emitting diode (18) driven by two FETs (22 and 21). In each embodiment (10 or 20), a gate (13 or 23) of the respective drive circuit accepts the TTL or standard CMOS logic voltage. Further, in each embodiment current limiting is accomplished by coupling a gate with the source of the FET (11 or 22). Thus, the output of the light emitting diode (18, 18) is controlled by an input signal to the drive circuit.

Abstract translation: 具有光发射部分（18）和驱动部分（11或22和21）的单片光电集成电路。 驱动部分能够接受TTL和标准CMOS逻辑电压电平。 在第一实施例中，单片光电集成电路（10）具有由双栅极FET（11）驱动的发光二极管（18）。 在第二实施例中，单片光电集成电路（20）具有由两个FET（22和21）驱动的发光二极管（18）。 在每个实施例（10或20）中，相应驱动电路的栅极（13或23）接受TTL或标准CMOS逻辑电压。 此外，在每个实施例中，通过将栅极与FET（11或22）的源耦合来实现电流限制。 因此，发光二极管（18,18）的输出由驱动电路的输入信号控制。

公开(公告)号：US5256580A

公开(公告)日：1993-10-26

申请号：US864101

申请日：1992-04-06

Applicant: Craig A. Gaw ,  Ronald W. Slocumb ,  Curtis D. Moyer

Inventor： Craig A. Gaw ,  Ronald W. Slocumb ,  Curtis D. Moyer

IPC: H01L21/28 ,  H01L21/306 ,  H01L33/00 ,  H01L33/20 ,  H01L33/38 ,  H01L21/20 ,  H01L21/265

CPC classification number: H01L33/38 ,  H01L21/28 ,  H01L21/30612 ,  H01L33/0062 ,  H01L33/20

Abstract: An optical semiconductor device is formed by using one controlled etch to form a "T" shaped contact structure on the device (20). The etch rate is controlled by judicious selection of materials to provide a cladding layer (17) that has a predetermined etch rate in hydrofluoric acid, a support layer (10) and a contact layer (18) that are not affected by hydrofluoric acid, a lift-off layer (19) that is dissolved by hydrofluoric acid, and a barrier layer (21). Dissolving of the lift-off layer (19) facilitates removing the barrier layer (21).

Abstract translation: 通过使用一个受控蚀刻在器件（20）上形成“T”形接触结构来形成光学半导体器件。 通过明智选择材料来控制蚀刻速率，以提供在氢氟酸中具有预定蚀刻速率的包覆层（17），不受氢氟酸影响的支撑层（10）和接触层（18）， 由氢氟酸溶解的剥离层（19）和阻挡层（21）。 剥离层（19）的溶解有利于去除阻挡层（21）。

公开(公告)号：US09905658B2

公开(公告)日：2018-02-27

申请号：US14090327

申请日：2013-11-26

Applicant: Darrell G. Hill ,  Stephen H. Kilgore ,  Craig A. Gaw

Inventor： Darrell G. Hill ,  Stephen H. Kilgore ,  Craig A. Gaw

IPC: H01L29/40 ,  H01L29/778 ,  H01L29/49 ,  H01L29/66 ,  H01L29/20

CPC classification number: H01L29/402 ,  H01L29/2003 ,  H01L29/4958 ,  H01L29/4966 ,  H01L29/66462 ,  H01L29/7787

Abstract: An embodiment of a transistor includes a semiconductor substrate, spaced-apart source and drain electrodes coupled to the semiconductor substrate, a gate electrode coupled to the semiconductor substrate between the source and drain electrodes, a dielectric layer over the gate electrode and at least a portion of the semiconductor substrate, and a field plate structure over the dielectric layer, wherein the field plate structure includes a gold-containing material and one or more migration inhibiting materials.

公开(公告)号：US5995531A

公开(公告)日：1999-11-30

申请号：US963624

申请日：1997-11-04

Applicant: Craig A. Gaw ,  Wenbin Jiang ,  Benjamin W. Gable

Inventor： Craig A. Gaw ,  Wenbin Jiang ,  Benjamin W. Gable

IPC: H01S5/183 ,  H01S5/20 ,  H01S3/08 ,  H01L21/20

CPC classification number: H01S5/18355 ,  H01S5/18308 ,  H01S5/18327 ,  H01S5/18338 ,  H01S5/2063

Abstract: A vertical cavity surface emitting laser with polarization control includes a first stack of distributed Bragg reflectors positioned on a substrate with an active region including a first cladding region and a second cladding region positioned on opposite sides of an active area overlying the first stack of distributed Bragg reflectors A second stack of distributed Bragg reflectors is positioned on the active region. The second stack has an ion implantation region formed to control and define a lasing threshold of the laser. The second stack further is formed into a ridge with the ridge being etched into the ion implantation region to form an elongated shape so as to polarize light emitted by the second stack of distributed Bragg reflectors

Abstract translation: 具有偏振控制的垂直腔表面发射激光器包括位于衬底上的分布式布拉格反射器的第一叠层，其具有有源区域，该有源区域包括第一覆层区域和位于覆盖分布布拉格的第一堆叠层的有源区域相对侧上的第二覆盖区域 反射器第二层分布式布拉格反射器位于有源区上。 第二堆叠具有形成为控制和限定激光器的激光阈值的离子注入区域。 第二堆叠进一步形成为脊，其中脊被蚀刻到离子注入区域中以形成细长形状，以便使由分布布拉格反射器的第二堆叠发射的光偏振

公开(公告)号：US5939773A

公开(公告)日：1999-08-17

申请号：US692355

申请日：1996-08-05

Applicant: Wenbin Jiang ,  Michael S. Lebby ,  Craig A. Gaw

Inventor： Wenbin Jiang ,  Michael S. Lebby ,  Craig A. Gaw

IPC: H01S5/022 ,  H01L23/495 ,  H01L23/02 ,  H01L23/28

CPC classification number: H01S5/02244 ,  H01S5/02228 ,  H01L2924/0002 ,  H01S5/02288 ,  H01S5/0683 ,  H01S5/183

Abstract: A semiconductor laser package including a laser chip mounted to a leadframe, and a plastic resin housing for encapsulating the laser chip. The laser chip composed of a vertical cavity surface emitting laser and a photodetector. The vertical cavity surface emitting laser generating an emission along a path. The leadframe being positioned a fixed distance from an emission window formed in the plastic resin housing. The laser chip mounted in precise z-axis alignment from the emission window utilizing the leadframe as a dimensional reference point, with the bump height compensating for variations in laser chip dimension. An optical element is optionally positioned in the path to reflect a portion of the emission.

Abstract translation: 一种半导体激光器封装，包括安装在引线框架上的激光芯片和用于封装激光芯片的塑料树脂外壳。 激光芯片由垂直腔表面发射激光器和光电检测器组成。 垂直腔表面发射激光器沿着路径产生发射。 引线框架与形成在塑料树脂壳体中的发射窗口定位一定距离。 激光芯片以发射窗口的精确z轴对准，利用引线框架作为尺寸参考点，凸起高度补偿了激光芯片尺寸的变化。 光学元件可选地位于路径中以反映发射的一部分。

公开(公告)号：US5838705A

公开(公告)日：1998-11-17

申请号：US743288

申请日：1996-11-04

Applicant: Chang-Long Shieh ,  Wenbin Jiang ,  Paul Claisse ,  Craig A. Gaw

Inventor： Chang-Long Shieh ,  Wenbin Jiang ,  Paul Claisse ,  Craig A. Gaw

IPC: H01L33/10 ,  H01S5/183 ,  H01S5/32 ,  H01S5/343 ,  H01S3/19 ,  H01L33/00 ,  H01S3/08

CPC classification number: H01S5/18308 ,  B82Y20/00 ,  H01L33/105 ,  H01S2301/173 ,  H01S2301/176 ,  H01S5/18327 ,  H01S5/2059 ,  H01S5/3201 ,  H01S5/3211 ,  H01S5/3218 ,  H01S5/34313

Abstract: A first stack (112) of distributed Bragg reflectors, a first cladding region (114) disposed on the first stack of distributed Bragg reflectors (112) and including a defect inhibition layer (117) an active area (122) disposed on the first cladding region (114), a second cladding region (132) disposed on the active area (122) and including a defective inhibition layer (136), and a second stack (140) of distributed Bragg reflectors disposed on the second cladding region (132). The defect inhibition layers (117, 136) substantially prevent defects in the active area (122).

Abstract translation: 分布布拉格反射器的第一叠层（112），布置在分布布拉格反射器（112）的第一叠层上的第一包层区域（114），并且包括缺陷抑制层（117）设置在第一包层上的有源区域 区域（114），设置在有源区域（122）上并且包括不良抑制层（136）的第二包层区域（132）和布置在第二包层区域（132）上的分布布拉格反射器的第二堆叠（140） 。 缺陷抑制层（117,136）基本上防止了有源区域（122）中的缺陷。

公开(公告)号：US5574744A

公开(公告)日：1996-11-12

申请号：US383151

申请日：1995-02-03

Applicant: Craig A. Gaw ,  Chan-Long Shieh ,  Michael S. Lebby

Inventor： Craig A. Gaw ,  Chan-Long Shieh ,  Michael S. Lebby

IPC: H01L31/10 ,  G02B6/12 ,  H01L31/12 ,  H01L31/173 ,  H01S5/00 ,  H01S5/026 ,  H01S5/183 ,  H01S3/18

CPC classification number: G02B6/12004 ,  H01L31/173 ,  H01S5/0264 ,  H01S5/18308 ,  H01S5/2059 ,  H01S5/423

Abstract: A substrate having a first surface and a second surface, the first surface having a vertical cavity surface emitting laser disposed therein and second surface having a photodetector integrated disposed therein, wherein the vertical cavity surface emitting laser directs a light signal toward the photodetector.

Abstract translation: 一种具有第一表面和第二表面的衬底，所述第一表面具有设置在其中的垂直腔表面发射激光器，并且具有集成在其中的光电检测器的第二表面，其中所述垂直腔表面发射激光器将光信号引导到所述光电检测器。