公开(公告)号：US09385304B2

公开(公告)日：2016-07-05

申请号：US14203249

申请日：2014-03-10

Applicant: Masahiko Nakayama ,  Tadashi Kai ,  Masaru Toko ,  Hiroaki Yoda ,  Hyung Suk Lee ,  Jae Geun Oh ,  Choon Kun Ryu ,  Min Suk Lee

Inventor： Masahiko Nakayama ,  Tadashi Kai ,  Masaru Toko ,  Hiroaki Yoda ,  Hyung Suk Lee ,  Jae Geun Oh ,  Choon Kun Ryu ,  Min Suk Lee

IPC: H01L27/00 ,  H01L43/02 ,  H01L43/12 ,  H01L45/00 ,  G11C11/56 ,  G11C11/15 ,  G11C11/16 ,  H01L27/22 ,  H01L27/24 ,  H01L43/08 ,  H01L43/10

CPC classification number: H01L43/02 ,  G11C11/15 ,  G11C11/16 ,  G11C11/161 ,  G11C11/1659 ,  G11C11/5607 ,  H01L27/222 ,  H01L27/228 ,  H01L27/2463 ,  H01L43/08 ,  H01L43/10 ,  H01L43/12 ,  H01L45/04

Abstract: According to one embodiment, a magnetic memory is disclosed. The memory includes a conductive layer containing a first metal material, a stacked body above the conductive layer, and including a first magnetization film containing a second metal material, a second magnetization film, and a tunnel barrier layer between the first magnetization film and the second magnetization film, and an insulating layer on a side face of the stacked body, and containing an oxide of the first metal material. The first magnetization film and/or the second magnetization film includes a first region positioned in a central portion, and a second region positioned in an edge portion and containing As, P, Ge, Ga, Sb, In, N, Ar, He, F, Cl, Br, I, Si, B, C, O, Zr, Tb, S, Se, or Ti.

Abstract translation: 根据一个实施例，公开了一种磁存储器。 该存储器包括一个包含第一金属材料的导电层，在该导电层上方的层叠体，并且包括一个第一磁化膜，该第一磁化膜含有第二金属材料，第二磁化膜和第一磁化膜与第二磁化膜之间的隧道势垒层 磁化膜和层叠体的侧面上的绝缘层，并且含有第一金属材料的氧化物。 第一磁化膜和/或第二磁化膜包括位于中心部分的第一区域和位于边缘部分中并且包含As，P，Ge，Ga，Sb，In，N，Ar，He的第二区域， F，Cl，Br，I，Si，B，C，O，Zr，Tb，S，Se或Ti。

公开(公告)号：US09123879B2

公开(公告)日：2015-09-01

申请号：US14202802

申请日：2014-03-10

Applicant: Masahiko Nakayama ,  Masatoshi Yoshikawa ,  Tadashi Kai ,  Yutaka Hashimoto ,  Masaru Toko ,  Hiroaki Yoda ,  Jae Geun Oh ,  Keum Bum Lee ,  Choon Kun Ryu ,  Hyung Suk Lee ,  Sook Joo Kim

Inventor： Masahiko Nakayama ,  Masatoshi Yoshikawa ,  Tadashi Kai ,  Yutaka Hashimoto ,  Masaru Toko ,  Hiroaki Yoda ,  Jae Geun Oh ,  Keum Bum Lee ,  Choon Kun Ryu ,  Hyung Suk Lee ,  Sook Joo Kim

IPC: H01L27/00 ,  H01L43/02 ,  H01L27/22 ,  H01L43/08 ,  H01L43/12

CPC classification number: H01L43/02 ,  H01L27/222 ,  H01L27/224 ,  H01L27/226 ,  H01L43/08 ,  H01L43/10 ,  H01L43/12

Abstract: According to one embodiment, a magnetoresistive element is disclosed. The magnetoresistive element includes a reference layer, a tunnel barrier layer, a storage layer. The storage layer includes a first region and a second region provided outside the first region to surround the first region, the second region including element included in the first region and another element being different from the element. The magnetoresistive element further includes a cap layer including a third region and a fourth region provided outside the third region to surround the third region, the fourth region including an element included in the third region and the another element.

Abstract translation: 根据一个实施例，公开了一种磁阻元件。 磁阻元件包括参考层，隧道势垒层，存储层。 存储层包括第一区域和设置在第一区域外部以围绕第一区域的第二区域，第二区域包括包含在第一区域中的元素，而另一个元素不同于元件。 磁阻元件进一步包括盖层，该盖层包括第三区域和设置在第三区域外部以包围第三区域的第四区域，第四区域包括包括在第三区域中的元件和另一元件。

公开(公告)号：US20150069557A1

公开(公告)日：2015-03-12

申请号：US14202802

申请日：2014-03-10

Applicant: Masahiko NAKAYAMA ,  Masatoshi YOSHIKAWA ,  Tadashi KAI ,  Yutaka HASHIMOTO ,  Masaru TOKO ,  Hiroaki YODA ,  Jae Geun OH ,  Keum Bum LEE ,  Choon Kun RYU ,  Hyung Suk LEE ,  Sook Joo KIM

Inventor： Masahiko NAKAYAMA ,  Masatoshi YOSHIKAWA ,  Tadashi KAI ,  Yutaka HASHIMOTO ,  Masaru TOKO ,  Hiroaki YODA ,  Jae Geun OH ,  Keum Bum LEE ,  Choon Kun RYU ,  Hyung Suk LEE ,  Sook Joo KIM

IPC: H01L43/02 ,  H01L43/12

CPC classification number: H01L43/02 ,  H01L27/222 ,  H01L27/224 ,  H01L27/226 ,  H01L43/08 ,  H01L43/10 ,  H01L43/12

Abstract: According to one embodiment, a magnetoresistive element is disclosed. The magnetoresistive element includes a reference layer, a tunnel barrier layer, a storage layer. The storage layer includes a first region and a second region provided outside the first region to surround the first region, the second region including element included in the first region and another element being different from the element. The magnetoresistive element further includes a cap layer including a third region and a fourth region provided outside the third region to surround the third region, the fourth region including an element included in the third region and the another element.

Abstract translation: 根据一个实施例，公开了一种磁阻元件。 磁阻元件包括参考层，隧道势垒层，存储层。 存储层包括第一区域和设置在第一区域外部以围绕第一区域的第二区域，第二区域包括包含在第一区域中的元素，而另一个元素不同于元件。 磁阻元件进一步包括盖层，该盖层包括第三区域和设置在第三区域外部以包围第三区域的第四区域，第四区域包括包括在第三区域中的元件和另一元件。

公开(公告)号：US20120100707A1

公开(公告)日：2012-04-26

申请号：US13280799

申请日：2011-10-25

Applicant: Choon-Kun RYU

Inventor： Choon-Kun RYU

IPC: H01L21/28

CPC classification number: H01L29/7926 ,  H01L27/11556 ,  H01L27/11582 ,  H01L29/7889

Abstract: A method for fabricating a non-volatile memory device with a three-dimensional structure includes forming a pipe gate conductive layer on a substrate, forming a pipe channel hole in the pipe gate conductive layer, burying a first sacrificial layer in the pipe channel hole, stacking interlayer dielectric layers and gate conductive layers on the pipe gate conductive layer including the first sacrificial layer, forming a pair of cell channel holes in the interlayer dielectric layers and the gate conductive layers, forming a second sacrificial layer on a resultant structure including the pair of cell channel holes, and forming a third sacrificial layer with etching selectivity relative to the second sacrificial layer on the second sacrificial layer and filling the cell channel holes with the third sacrificial layer.

Abstract translation: 一种用于制造具有三维结构的非易失性存储器件的方法包括在衬底上形成管栅极导电层，在管栅极导电层中形成管道通道孔，在管道孔中埋设第一牺牲层， 在包括第一牺牲层的管栅极导电层上层叠层间介质层和栅极导电层，在层间电介质层和栅极导电层中形成一对电池沟道孔，在包含该对的所得结构上形成第二牺牲层 的细胞通道孔，并且相对于第二牺牲层上的第二牺牲层形成具有蚀刻选择性的第三牺牲层，并且用第三牺牲层填充细胞通道孔。

公开(公告)号：US07211524B2

公开(公告)日：2007-05-01

申请号：US10310143

申请日：2002-12-05

Applicant: Choon Kun Ryu ,  Tae Kyung Kim

Inventor： Choon Kun Ryu ,  Tae Kyung Kim

IPC: H01L21/31 ,  H01L21/469

CPC classification number: H01L21/02126 ,  C23C16/401 ,  C23C16/515 ,  C23C16/56 ,  H01L21/02203 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/31633 ,  H01L21/31695

Abstract: The present invention relates to a method of forming an insulating film in a semiconductor device. After a mixed gas of alkyl silane gas and N2O gas is supplied into the deposition equipment, a radio frequency power including a short pulse wave for causing incomplete reaction upon a gas phase reaction is applied to generate nano particle. The nano particle is then reacted to oxygen radical to form the insulating film including a plurality of nano voids. A low-dielectric insulating film that can be applied to the nano technology even in the existing LECVD equipment is formed.

Abstract translation: 本发明涉及在半导体器件中形成绝缘膜的方法。 在沉积设备中提供烷基硅烷气体和N 2 O 2气体的混合气体后，施加包括在气相反应中引起不完全反应的短脉冲波的射频功率以产生纳米 粒子。 然后使纳米颗粒与氧自由基反应以形成包括多个纳米空隙的绝缘膜。 形成即使在现有的LECVD设备中也可应用于纳米技术的低介电绝缘膜。

公开(公告)号：US5990000A

公开(公告)日：1999-11-23

申请号：US803304

申请日：1997-02-20

Applicant: Soonil Hong ,  Choon Kun Ryu ,  Michael P. Nault ,  Kaushal K. Singh ,  Anthony Lam ,  Virendra V. S. Rana ,  Andrew Conners

Inventor： Soonil Hong ,  Choon Kun Ryu ,  Michael P. Nault ,  Kaushal K. Singh ,  Anthony Lam ,  Virendra V. S. Rana ,  Andrew Conners

IPC: H01L21/302 ,  H01L21/3065 ,  H01L21/31 ,  H01L21/3105 ,  H01L21/316 ,  H01L21/3205 ,  H01L21/306

CPC classification number: H01L21/31051

Abstract: A method and an apparatus for depositing a dielectric layer to fill in a gap between adjacent metal lines. In preferred embodiments of the method, a first dielectric layer is deposited over the lines and subsequently etched using both chemical and physical etchback steps. After the etchback steps are completed, a second dielectric layer is deposited over the first dielectric layer to fill in the gap.

Abstract translation: 一种用于沉积介电层以填充相邻金属线之间的间隙的方法和装置。 在该方法的优选实施例中，第一电介质层沉积在线上并随后使用化学和物理回蚀步骤进行蚀刻。 在回蚀步骤完成之后，第二介电层沉积在第一介电层上以填充间隙。

公开(公告)号：US20100210104A1

公开(公告)日：2010-08-19

申请号：US12427870

申请日：2009-04-22

Applicant: Hyung Soon Park ,  Noh Jung Kwak ,  Seung Jin Yeom ,  Choon Kun Ryu ,  Jong Goo Jung ,  Sung Jun Kim

Inventor： Hyung Soon Park ,  Noh Jung Kwak ,  Seung Jin Yeom ,  Choon Kun Ryu ,  Jong Goo Jung ,  Sung Jun Kim

IPC: H01L21/768 ,  H01L21/306

CPC classification number: H01L21/02074 ,  H01L21/3212 ,  H01L21/7684 ,  H01L21/76883

Abstract: A process for forming a copper wiring and the prevention of copper ion migration in a semiconductor device is disclosed herein. The process includes conducting a post-cleaning process for a copper layer that is to form the cooper wiring after already having undergone a CMP process. The post-cleaning process includes conducting a primary chemical cleaning using a citric acid-based chemical. A secondary chemical cleaning is then conducted on the copper layer having undergone the primary chemical cleaning using an ascorbic acid-based chemical. After the post-cleaning process is completed, the migration of copper ions over time is prevented thereby improving the reliability of the semiconductor device.

Abstract translation: 本文公开了一种用于形成铜布线的方法和防止半导体器件中的铜离子迁移。 该方法包括对经过CMP工艺形成铜线的铜层进行后清洗处理。 后清洗过程包括使用基于柠檬酸的化学品进行初级化学清洗。 然后在使用抗坏血酸的化学品进行了主要化学清洗的铜层上进行二次化学清洗。 在完成后清洗处理之后，防止了铜离子随时间的迁移，从而提高了半导体器件的可靠性。

公开(公告)号：US07205242B2

公开(公告)日：2007-04-17

申请号：US10880278

申请日：2004-06-29

Applicant: Choon Kun Ryu

Inventor： Choon Kun Ryu

IPC: H01L21/302 ,  H01L21/461

CPC classification number: H01L27/115 ,  H01L21/31055 ,  H01L21/31116 ,  H01L21/76224 ,  H01L27/11521

Abstract: The present invention relates to a method for forming an insulating layer in a semiconductor device. After a first oxide film is formed in a trench, an impurity remaining on the first oxide film in the process of etching the first oxide film using a gas containing fluorine is stripped using oxygen plasma or hydrogen plasma. Thus, it can prevent degradation of device properties due to diffusion of the impurity without additional equipment. Therefore, it can help improve reliability of a next-generation device.

Abstract translation: 本发明涉及一种在半导体器件中形成绝缘层的方法。 在沟槽中形成第一氧化物膜之后，使用氧等离子体或氢等离子体来剥离在使用含氟气体蚀刻第一氧化膜的过程中残留在第一氧化物膜上的杂质。 因此，它可以防止由于杂质扩散而导致的器件性质的劣化，而没有附加的设备。 因此，它可以帮助提高下一代设备的可靠性。

公开(公告)号：US09406871B2

公开(公告)日：2016-08-02

申请号：US14807267

申请日：2015-07-23

Applicant: Masahiko Nakayama ,  Masatoshi Yoshikawa ,  Tadashi Kai ,  Yutaka Hashimoto ,  Masaru Toko ,  Hiroaki Yoda ,  Jae Geun Oh ,  Keum Bum Lee ,  Choon Kun Ryu ,  Hyung Suk Lee ,  Sook Joo Kim

Inventor： Masahiko Nakayama ,  Masatoshi Yoshikawa ,  Tadashi Kai ,  Yutaka Hashimoto ,  Masaru Toko ,  Hiroaki Yoda ,  Jae Geun Oh ,  Keum Bum Lee ,  Choon Kun Ryu ,  Hyung Suk Lee ,  Sook Joo Kim

IPC: H01L43/00 ,  H01L43/02 ,  H01L27/22 ,  H01L43/08 ,  H01L43/12 ,  H01L43/10

CPC classification number: H01L43/02 ,  H01L27/222 ,  H01L27/224 ,  H01L27/226 ,  H01L43/08 ,  H01L43/10 ,  H01L43/12

Abstract: According to one embodiment, a magnetoresistive element is disclosed. The magnetoresistive element includes a reference layer, a tunnel barrier layer, a storage layer. The storage layer includes a first region and a second region provided outside the first region to surround the first region, the second region including element included in the first region and another element being different from the element. The magnetoresistive element further includes a cap layer including a third region and a fourth region provided outside the third region to surround the third region, the fourth region including an element included in the third region and the another element.

公开(公告)号：US20150069558A1

公开(公告)日：2015-03-12

申请号：US14203249

申请日：2014-03-10

Applicant: Masahiko NAKAYAMA ,  Tadashi KAI ,  Masaru TOKO ,  Hiroaki YODA ,  Hyung Suk LEE ,  Jae Geun OH ,  Choon Kun RYU ,  Min Suk LEE

Inventor： Masahiko NAKAYAMA ,  Tadashi KAI ,  Masaru TOKO ,  Hiroaki YODA ,  Hyung Suk LEE ,  Jae Geun OH ,  Choon Kun RYU ,  Min Suk LEE

IPC: H01L43/02 ,  H01L43/12

CPC classification number: H01L43/02 ,  G11C11/15 ,  G11C11/16 ,  G11C11/161 ,  G11C11/1659 ,  G11C11/5607 ,  H01L27/222 ,  H01L27/228 ,  H01L27/2463 ,  H01L43/08 ,  H01L43/10 ,  H01L43/12 ,  H01L45/04

Abstract: According to one embodiment, a magnetic memory is disclosed. The memory includes a conductive layer containing a first metal material, a stacked body above the conductive layer, and including a first magnetization film containing a second metal material, a second magnetization film, and a tunnel barrier layer between the first magnetization film and the second magnetization film, and an insulating layer on a side face of the stacked body, and containing an oxide of the first metal material. The first magnetization film and/or the second magnetization film includes a first region positioned in a central portion, and a second region positioned in an edge portion and containing As, P, Ge, Ga, Sb, In, N, Ar, He, F, Cl, Br, I, Si, B, C, O, Zr, Tb, S, Se, or Ti.

Abstract translation: 根据一个实施例，公开了一种磁存储器。 该存储器包括一个包含第一金属材料的导电层，在该导电层上方的层叠体，并且包括一个第一磁化膜，该第一磁化膜含有第二金属材料，第二磁化膜和第一磁化膜与第二磁化膜之间的隧道势垒层 磁化膜和层叠体的侧面上的绝缘层，并且含有第一金属材料的氧化物。 第一磁化膜和/或第二磁化膜包括位于中心部分的第一区域和位于边缘部分中并且包含As，P，Ge，Ga，Sb，In，N，Ar，He的第二区域， F，Cl，Br，I，Si，B，C，O，Zr，Tb，S，Se或Ti。