公开(公告)号：US08384087B2

公开(公告)日：2013-02-26

申请号：US12805995

申请日：2010-08-27

申请人： Yong-Duck Son ,  Ki-Yong Lee ,  Joon-Hoo Choi ,  Min-Jae Jeong ,  Seung-Kyu Park ,  Kil-Won Lee ,  Jae-Wan Jung ,  Dong-Hyun Lee ,  Byung-Soo So ,  Hyun-Woo Koo ,  Ivan Maidanchuk ,  Jong-Won Hong ,  Heung-Yeol Na ,  Seok-Rak Chang

发明人： Yong-Duck Son ,  Ki-Yong Lee ,  Joon-Hoo Choi ,  Min-Jae Jeong ,  Seung-Kyu Park ,  Kil-Won Lee ,  Jae-Wan Jung ,  Dong-Hyun Lee ,  Byung-Soo So ,  Hyun-Woo Koo ,  Ivan Maidanchuk ,  Jong-Won Hong ,  Heung-Yeol Na ,  Seok-Rak Chang

IPC分类号： H01L27/14

CPC分类号： H01L29/66757 ,  H01L27/1277 ,  H01L27/3262

摘要： A thin film transistor includes a substrate, a buffer layer on the substrate, a semiconductor layer including source/drain regions and a channel region on the buffer layer, a gate insulating layer corresponding to the channel region, a gate electrode corresponding to the channel region, and source/drain electrodes electrically connected to the semiconductor layer. A polysilicon layer of the channel region may include only a low angle grain boundary, and a high angle grain boundary may be disposed in a region of the semiconductor layer that is apart from the channel region.

摘要翻译： 薄膜晶体管包括衬底，衬底上的缓冲层，包括源极/漏极区域和缓冲层上的沟道区域的半导体层，对应于沟道区域的栅极绝缘层，对应于沟道区域的栅电极 以及与半导体层电连接的源极/漏极。 沟道区域的多晶硅层可以仅包括低角度晶界，并且可以在离开沟道区域的半导体层的区域中设置高角度晶界。

公开(公告)号：US20110227078A1

公开(公告)日：2011-09-22

申请号：US13034818

申请日：2011-02-25

申请人： Byoung-Keon PARK ,  Jin-Wook Seo ,  Ki-Yong Lee ,  Yun-Mo Chung ,  Jong-Ryuk Park ,  Tak-Young Lee ,  Dong-Hyun Lee ,  Kil-Won Lee ,  Byung-Soo So ,  Min-Jae Jeong ,  Yong-Duck Son ,  Seung-Kyu Park ,  Jae-Wan Jung

发明人： Byoung-Keon PARK ,  Jin-Wook Seo ,  Ki-Yong Lee ,  Yun-Mo Chung ,  Jong-Ryuk Park ,  Tak-Young Lee ,  Dong-Hyun Lee ,  Kil-Won Lee ,  Byung-Soo So ,  Min-Jae Jeong ,  Yong-Duck Son ,  Seung-Kyu Park ,  Jae-Wan Jung

IPC分类号： H01L51/56 ,  H01L51/52

CPC分类号： H01L27/3262 ,  H01L27/12 ,  H01L27/1248 ,  H01L27/3258 ,  H01L27/326

摘要： A display device including: a substrate; a first semiconductor layer disposed on the substrate; a second semiconductor layer disposed on the substrate and adjacent to the first semiconductor layer; a first insulation layer disposed on both the first semiconductor layer and the second semiconductor layer, the first insulation layer including a first opening forming a space between the first semiconductor layer and the second semiconductor layer; and a second insulation layer disposed on the first insulation layer and that fills the first opening.

摘要翻译： 一种显示装置，包括：基板; 设置在所述基板上的第一半导体层; 设置在所述基板上并与所述第一半导体层相邻的第二半导体层; 设置在第一半导体层和第二半导体层两者上的第一绝缘层，第一绝缘层包括在第一半导体层和第二半导体层之间形成空间的第一开口; 以及设置在第一绝缘层上并填充第一开口的第二绝缘层。

公开(公告)号：US20110220878A1

公开(公告)日：2011-09-15

申请号：US12926210

申请日：2010-11-02

申请人： Tak-Young Lee ,  Byoung-Keon Park ,  Yun-Mo Chung ,  Jong-Ryuk Park ,  Dong-Hyun Lee ,  Ki-Yong Lee ,  Jin-Wook Seo ,  Min-Jae Jeong ,  Young-Duck Son ,  Byung-Soo So ,  Seung-Kyu Park ,  Kil-Won Lee ,  Jae-Wan Jung

发明人： Tak-Young Lee ,  Byoung-Keon Park ,  Yun-Mo Chung ,  Jong-Ryuk Park ,  Dong-Hyun Lee ,  Ki-Yong Lee ,  Jin-Wook Seo ,  Min-Jae Jeong ,  Young-Duck Son ,  Byung-Soo So ,  Seung-Kyu Park ,  Kil-Won Lee ,  Jae-Wan Jung

IPC分类号： H01L51/00 ,  H01L29/772 ,  H01L21/336

CPC分类号： H01L29/78645

摘要： A thin film transistor (TFT) includes a substrate, and an active region on the substrate including source and drain regions at opposing ends of the active region, a lightly doped region adjacent to at least one of the source region and the drain region, a plurality of channel regions, and a highly doped region between two channel regions of the plurality of channel regions. The TFT includes a gate insulation layer on the active region, and a multiple gate electrode having a plurality of gate electrodes on the gate insulation layer, the plurality of channel regions being disposed below corresponding gate electrodes, and the source region and the drain region being disposed adjacent to outermost portions of the multiple gate electrode. The TFT includes a first interlayer insulation layer on the multiple gate electrode, and source and drain electrodes extending through the first interlayer insulation layer and contacting the respective source and drain regions.

摘要翻译： 薄膜晶体管（TFT）包括衬底，并且衬底上的有源区域包括在有源区的相对端处的源极和漏极区域，与源区域和漏极区域中的至少一个相邻的轻掺杂区域， 多个沟道区，以及多个沟道区的两个沟道区之间的高掺杂区。 TFT包括在有源区上的栅极绝缘层和在栅绝缘层上具有多个栅电极的多栅电极，多个沟道区设置在相应的栅极下方，源区和漏区为 邻近多栅电极的最外部设置。 TFT包括在多栅电极上的第一层间绝缘层，以及延伸穿过第一层间绝缘层并与相应的源极和漏极区接触的源极和漏极。

公开(公告)号：US20110114963A1

公开(公告)日：2011-05-19

申请号：US12805995

申请日：2010-08-27

申请人： Yong-Duck Son ,  Ki-Yong Lee ,  Joon-Hoo Choi ,  Min-Jae Jeong ,  Seung-Kyu Park ,  Kil-Won Lee ,  Jae-Wan Jung ,  Dong-Hyun Lee ,  Byung-Soo So ,  Hyun-Woo Koo ,  Ivan Maidanchuk ,  Jong-Won Hong ,  Heung-Yeol Na ,  Seok-Rak Chang

发明人： Yong-Duck Son ,  Ki-Yong Lee ,  Joon-Hoo Choi ,  Min-Jae Jeong ,  Seung-Kyu Park ,  Kil-Won Lee ,  Jae-Wan Jung ,  Dong-Hyun Lee ,  Byung-Soo So ,  Hyun-Woo Koo ,  Ivan Maidanchuk ,  Jong-Won Hong ,  Heung-Yeol Na ,  Seok-Rak Chang

IPC分类号： H01L51/52 ,  H01L29/786 ,  H01L21/336

CPC分类号： H01L29/66757 ,  H01L27/1277 ,  H01L27/3262

摘要： A thin film transistor includes a substrate, a buffer layer on the substrate, a semiconductor layer including source/drain regions and a channel region on the buffer layer, a gate insulating layer corresponding to the channel region, a gate electrode corresponding to the channel region, and source/drain electrodes electrically connected to the semiconductor layer. A polysilicon layer of the channel region may include only a low angle grain boundary, and a high angle grain boundary may be disposed in a region of the semiconductor layer that is apart from the channel region.

摘要翻译： 薄膜晶体管包括衬底，衬底上的缓冲层，包括源极/漏极区域和缓冲层上的沟道区域的半导体层，对应于沟道区域的栅极绝缘层，对应于沟道区域的栅电极 以及与半导体层电连接的源极/漏极。 沟道区域的多晶硅层可以仅包括低角度晶界，并且可以在离开沟道区域的半导体层的区域中设置高角度晶界。

公开(公告)号：US08841206B2

公开(公告)日：2014-09-23

申请号：US13211700

申请日：2011-08-17

申请人： Byoung-Keon Park ,  Jong-Ryuk Park ,  Yun-Mo Chung ,  Tak-Young Lee ,  Jin-Wook Seo ,  Ki-Yong Lee ,  Min-Jae Jeong ,  Yong-Duck Son ,  Byung-Soo So ,  Seung-Kyu Park ,  Dong-Hyun Lee ,  Kil-Won Lee ,  Jae-Wan Jung

发明人： Byoung-Keon Park ,  Jong-Ryuk Park ,  Yun-Mo Chung ,  Tak-Young Lee ,  Jin-Wook Seo ,  Ki-Yong Lee ,  Min-Jae Jeong ,  Yong-Duck Son ,  Byung-Soo So ,  Seung-Kyu Park ,  Dong-Hyun Lee ,  Kil-Won Lee ,  Jae-Wan Jung

IPC分类号： H01L21/20 ,  H01L21/36 ,  H01L21/02 ,  H01L29/786 ,  H01L29/66 ,  H01L27/32

CPC分类号： H01L27/3244 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/02667 ,  H01L21/02672 ,  H01L27/1277 ,  H01L27/3262 ,  H01L29/1033 ,  H01L29/66765 ,  H01L29/78609 ,  H01L29/78675 ,  H01L29/78678

摘要： A method of forming a polycrystalline silicon layer includes forming a first amorphous silicon layer and forming a second amorphous silicon layer such that the first amorphous silicon layer and the second amorphous silicon layer have different film qualities from each other, and crystallizing the first amorphous silicon layer and the second amorphous silicon layer using a metal catalyst to form a first polycrystalline silicon layer and a second polycrystalline silicon layer. A thin film transistor includes the polycrystalline silicon layer formed by the method and an organic light emitting device includes the thin film transistor.

摘要翻译： 形成多晶硅层的方法包括：形成第一非晶硅层并形成第二非晶硅层，使得第一非晶硅层和第二非晶硅层彼此具有不同的膜质量，并使第一非晶硅层 以及使用金属催化剂形成第一多晶硅层和第二多晶硅层的第二非晶硅层。 薄膜晶体管包括通过该方法形成的多晶硅层和包括薄膜晶体管的有机发光器件。

公开(公告)号：US08507917B2

公开(公告)日：2013-08-13

申请号：US13209617

申请日：2011-08-15

申请人： Byoung-Keon Park ,  Jin-Wook Seo ,  Ki-Yong Lee ,  Dong-Hyun Lee ,  Kil-Won Lee ,  Jong-Ryuk Park ,  Yun-Mo Chung ,  Tak-Young Lee ,  Byung-Soo So ,  Min-Jae Jeong ,  Seung-Kyu Park ,  Yong-Duck Son ,  Jae-Wan Jung

发明人： Byoung-Keon Park ,  Jin-Wook Seo ,  Ki-Yong Lee ,  Dong-Hyun Lee ,  Kil-Won Lee ,  Jong-Ryuk Park ,  Yun-Mo Chung ,  Tak-Young Lee ,  Byung-Soo So ,  Min-Jae Jeong ,  Seung-Kyu Park ,  Yong-Duck Son ,  Jae-Wan Jung

IPC分类号： H01L21/322

CPC分类号： H01L29/4908 ,  H01L21/02532 ,  H01L21/02672 ,  H01L27/1277 ,  H01L27/3262 ,  H01L29/66757 ,  H01L29/78675

摘要： A thin film transistor includes a substrate, a semiconductor layer provided on the substrate and crystallized by using a metal catalyst, a gate electrode insulated from and disposed on the semiconductor layer, and a getter layer disposed between the semiconductor layer and the gate electrode and formed with a metal oxide having a diffusion coefficient that is less than that of the metal catalyst in the semiconductor layer.

摘要翻译： 薄膜晶体管包括衬底，设置在衬底上并通过使用金属催化剂结晶的半导体层，绝缘并设置在半导体层上的栅电极以及设置在半导体层和栅电极之间的吸气剂层，并形成 其中金属氧化物的扩散系数小于半导体层中的金属催化剂的扩散系数。

公开(公告)号：US08373097B2

公开(公告)日：2013-02-12

申请号：US12713982

申请日：2010-02-26

申请人： Heung-Yeol Na ,  Min-Jae Jeong ,  Jong-Won Hong ,  Eu-Gene Kang ,  Seok-Rak Chang ,  Ki-Yong Lee ,  Jin-Wook Seo ,  Tae-Hoon Yang ,  Yun-Mo Chung ,  Byung-Soo So ,  Byoung-Keon Park ,  Dong-Hyun Lee ,  Kil-Won Lee ,  Won-Bong Baek ,  Jong-Ryuk Park ,  Bo-Kyung Choi ,  Ivan Maidanchuk ,  Jae-Wan Jung

发明人： Heung-Yeol Na ,  Min-Jae Jeong ,  Jong-Won Hong ,  Eu-Gene Kang ,  Seok-Rak Chang ,  Ki-Yong Lee ,  Jin-Wook Seo ,  Tae-Hoon Yang ,  Yun-Mo Chung ,  Byung-Soo So ,  Byoung-Keon Park ,  Dong-Hyun Lee ,  Kil-Won Lee ,  Won-Bong Baek ,  Jong-Ryuk Park ,  Bo-Kyung Choi ,  Ivan Maidanchuk ,  Jae-Wan Jung

IPC分类号： F27D11/00 ,  A21B1/00 ,  A21B1/22

CPC分类号： F27B17/0025 ,  H01L21/67109

摘要： An apparatus for thermally processing a plurality of substrates including a process chamber into which a boat having a plurality of substrates stacked thereon is loaded, and a heater chamber separate from the process chamber and having a plurality of heaters to apply heat to the process chamber. Here, the heaters are installed to correspond to all sides of the plurality of substrates. Therefore, it is possible to minimize a temperature distribution in the process chamber and uniformly supply heat to the entire region of the plurality of substrates.

摘要翻译： 一种用于热加工多个基板的装置，包括处理室，其中堆叠有多个基板的船只装载在该处理室中;以及加热器室，与处理室分离并具有多个加热器以向处理室施加热量。 这里，加热器安装成对应于多个基板的所有侧面。 因此，可以使处理室中的温度分布最小化并且均匀地向多个基板的整个区域供给热量。

公开(公告)号：US20120049199A1

公开(公告)日：2012-03-01

申请号：US13137428

申请日：2011-08-15

申请人： Yun-Mo Chung ,  Ki-Yong Lee ,  Jin-Wook Seo ,  Min-Jae Jeong ,  Seung-Kyu Park ,  Yong-Duck Son ,  Byung-Soo So ,  Byoung-Keon Park ,  Kil-Won Lee ,  Dong-Hyun Lee ,  Tak-Young Lee ,  Jong-Ryuk Park

发明人： Yun-Mo Chung ,  Ki-Yong Lee ,  Jin-Wook Seo ,  Min-Jae Jeong ,  Seung-Kyu Park ,  Yong-Duck Son ,  Byung-Soo So ,  Byoung-Keon Park ,  Kil-Won Lee ,  Dong-Hyun Lee ,  Tak-Young Lee ,  Jong-Ryuk Park

IPC分类号： H01L21/20 ,  H01L29/04 ,  H01L33/16 ,  H01L29/786 ,  H01L21/336

CPC分类号： H01L29/66757 ,  H01L21/02422 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02672 ,  H01L27/1218 ,  H01L27/1277 ,  H01L27/3262 ,  H01L29/78603

摘要： A method of forming a polycrystalline layer includes forming a buffer layer on a substrate; treating the buffer layer with hydrogen plasma; forming an amorphous silicon layer on the buffer layer; forming a metallic catalyst layer for crystallizing the amorphous silicon layer on the amorphous silicon layer; and heat treating the amorphous silicon layer to form a polycrystalline silicon layer.

摘要翻译： 形成多晶层的方法包括在基板上形成缓冲层; 用氢等离子体处理缓冲层; 在缓冲层上形成非晶硅层; 形成用于使非晶硅层上的非晶硅层结晶的金属催化剂层; 并且对非晶硅层进行热处理以形成多晶硅层。

公开(公告)号：US20110248277A1

公开(公告)日：2011-10-13

申请号：US12975809

申请日：2010-12-22

申请人： Dong-Hyun LEE ,  Ki-Yong LEE ,  Jin-Wook Seo ,  Min-Jae Jeong ,  Yong-Duck Son ,  Byung-Soo So ,  Seung-Kyu Park ,  Kil-Won Lee ,  Yun-Mo Chung ,  Byoung-Keon Park ,  Jong-Ryuk Park ,  Tak-Young Lee ,  Jae-Wan Jung

发明人： Dong-Hyun LEE ,  Ki-Yong LEE ,  Jin-Wook Seo ,  Min-Jae Jeong ,  Yong-Duck Son ,  Byung-Soo So ,  Seung-Kyu Park ,  Kil-Won Lee ,  Yun-Mo Chung ,  Byoung-Keon Park ,  Jong-Ryuk Park ,  Tak-Young Lee ,  Jae-Wan Jung

IPC分类号： H01L27/12 ,  H01L21/20 ,  H01L21/84

CPC分类号： H01L21/02532 ,  H01L21/02488 ,  H01L21/02672 ,  H01L27/1277 ,  H01L29/66757 ,  H01L29/66765

摘要： A method of crystallizing an amorphous silicon layer, a method of manufacturing a thin film transistor using the same, and a thin film transistor using the manufacturing method, the crystallizing method including: forming an amorphous silicon layer; positioning crystallization catalyst particles on the amorphous silicon layer to be separated from each other; selectively removing the crystallization catalyst particles from a portion of the amorphous silicon layer; and crystallizing the amorphous silicon layer by a heat treatment.

摘要翻译： 一种使非晶硅层结晶的方法，使用其的薄膜晶体管的制造方法和使用该制造方法的薄膜晶体管，所述结晶方法包括：形成非晶硅层; 将结晶催化剂颗粒定位在待分离的非晶硅层上; 从非晶硅层的一部分选择性地除去结晶催化剂颗粒; 并通过热处理使非晶硅层结晶。

公开(公告)号：US20110233529A1

公开(公告)日：2011-09-29

申请号：US12929694

申请日：2011-02-09

申请人： Yun-Mo Chung ,  Ki-Yong Lee ,  Jin-Wook Seo ,  Min-Jae Jeong ,  Yong-Duck Son ,  Byung-Soo So ,  Seung-Kyu Park ,  Byoung-Keon Park ,  Dong-Hyun Lee ,  Kil-Won Lee ,  Tak-Young Lee ,  Jong-Ryuk Park ,  Jae-Wan Jung

发明人： Yun-Mo Chung ,  Ki-Yong Lee ,  Jin-Wook Seo ,  Min-Jae Jeong ,  Yong-Duck Son ,  Byung-Soo So ,  Seung-Kyu Park ,  Byoung-Keon Park ,  Dong-Hyun Lee ,  Kil-Won Lee ,  Tak-Young Lee ,  Jong-Ryuk Park ,  Jae-Wan Jung

IPC分类号： H01L51/52 ,  H01L29/786 ,  H01L21/336

CPC分类号： H01L29/66742 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/3262 ,  H01L27/3274 ,  H01L29/66757 ,  H01L29/78618 ,  H01L51/0081

摘要： A substrate including a thin film transistor, the substrate including an active layer disposed on the substrate, the active layer including a channel area and source and drain areas, a gate electrode disposed on the active layer, the channel area corresponding to the gate electrode, a gate insulating layer interposed between the active layer and the gate electrode, an interlayer insulating layer disposed to cover the active layer and the gate electrode, the interlayer insulating layer having first and second contact holes partially exposing the active layer, source and drain electrodes disposed on the interlayer insulating layer, the source and drain areas corresponding to the source and drain electrodes, and ohmic contact layers, the ohmic contact layers being interposed between the interlayer insulating layer and the source and drain electrodes, and contacting the source and drain areas through the first and second contact holes.

摘要翻译： 一种包括薄膜晶体管的基板，所述基板包括设置在所述基板上的有源层，所述有源层包括沟道区域和源极和漏极区域，设置在所述有源层上的栅极电极，对应于所述栅电极的沟道区域， 插入在有源层和栅电极之间的栅极绝缘层，设置成覆盖有源层和栅电极的层间绝缘层，具有部分地暴露有源层的第一和第二接触孔的层间绝缘层，设置的源极和漏极 在层间绝缘层上，对应于源极和漏极以及欧姆接触层的源极和漏极区域，欧姆接触层介于层间绝缘层和源极和漏极之间，并且使源极和漏极区域通过 第一和第二接触孔。