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公开(公告)号:US20210405399A1
公开(公告)日:2021-12-30
申请号:US17306853
申请日:2021-05-03
Applicant: Applied Materials, Inc.
Inventor: Russell Chin Yee TEO , Ludovic GODET , Nir YAHAV , Robert Jan VISSER
IPC: G02F1/035
Abstract: An electro-optical waveguide modulator device includes a seed layer on a substrate, the seed layer having a first crystallographic plane aligned with a surface of the seed layer, an electro-optical channel extending in a first direction on the seed layer and having a second crystallographic plane aligned with the surface of the seed layer, an insulator layer on both sides of the electro-optical channel on the substrate in a second direction perpendicular to the first direction, an electrode barrier layer on the electro-optical channel and the insulator layer, and one or more of electrodes extending in the second direction. The seed layer and the insulator layer each comprise material having a refractive index that is lower than the electro-optical channel.
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82.
公开(公告)号:US20210223686A1
公开(公告)日:2021-07-22
申请号:US16941304
申请日:2020-07-28
Applicant: Applied Materials, Inc.
Inventor: Amita JOSHI , Ian Matthew MCMACKIN , Rami HOURANI , Yingdong LUO , Sivapackia GANAPATHIAPPAN , Ludovic GODET
Abstract: Embodiments of the present disclosure generally relate to imprint compositions and materials and related processes useful for nanoimprint lithography (NIL). In one or more embodiments, an imprint composition contains one or more types of nanoparticles, one or more surface ligands, one or more solvents, one or more additives, and one or more acrylates.
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公开(公告)号:US20210066036A1
公开(公告)日:2021-03-04
申请号:US17080802
申请日:2020-10-26
Applicant: Applied Materials, Inc.
Inventor: Ludovic GODET , Rutger MEYER TIMMERMAN THIJSSEN , Kartik RAMASWAMY , Yang YANG , Manivannan THOTHADRI , Chien-An CHEN
IPC: H01J37/305 , H01J37/32 , H01J37/073 , G02B6/13 , H01J37/147 , H01L21/3065 , G02B5/18
Abstract: Aspects of the disclosure relate to apparatus for the fabrication of waveguides. In one example, an angled ion source is utilized to project ions toward a substrate to form a waveguide which includes angled gratings. In another example, an angled electron beam source is utilized to project electrons toward a substrate to form a waveguide which includes angled gratings. Further aspects of the disclosure provide for methods of forming angled gratings on waveguides utilizing an angled ion beam source and an angled electron beam source.
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公开(公告)号:US20190259648A1
公开(公告)日:2019-08-22
申请号:US16260675
申请日:2019-01-29
Applicant: Applied Materials, Inc.
Inventor: Joseph YUDOVSKY , Visweswaren SIVARAMAKRISHNAN , Ludovic GODET , Rutger Meyer TIMMERMAN THIJSSEN
IPC: H01L21/687 , G03F7/20
Abstract: Embodiments described herein relate to a substrate chucking apparatus having a plurality of cavities formed therein. The cavities are formed in a body of the chucking apparatus. In one embodiment, a first plurality of ports are formed in a chucking surface of the body and extend to a bottom surface of the body. In another embodiment, a second plurality of ports are formed in a bottom surface of the plurality of cavities and extend through the body to a bottom surface of the body.
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公开(公告)号:US20190172686A1
公开(公告)日:2019-06-06
申请号:US16250763
申请日:2019-01-17
Applicant: Applied Materials, Inc.
Inventor: Bencherki MEBARKI , Annamalai LAKSHMANAN , Kaushal K. SINGH , Andrew COCKBURN , Ludovic GODET , Paul F. MA , Mehul B. NAIK
IPC: H01J37/32 , H01L21/768 , C23C16/42 , H01L21/3205 , C23C16/56 , H01L21/285 , H01L21/268
Abstract: Methods and apparatus for forming a metal silicide as nanowires for back-end interconnection structures for semiconductor applications are provided. In one embodiment, the method includes forming a metal silicide layer on a substrate by a chemical vapor deposition process or a physical vapor deposition process, thermal treating the metal silicide layer in a processing chamber, applying a microwave power in the processing chamber while thermal treating the metal silicide layer; and maintaining a substrate temperature less than 400 degrees Celsius while thermal treating the metal silicide layer. In another embodiment, a method includes supplying a deposition gas mixture including at least a metal containing precursor and a reacting gas on a surface of a substrate, forming a plasma in the presence of the deposition gas mixture by exposure to microwave power, exposing the plasma to light radiation, and forming a metal silicide layer on the substrate from the deposition gas.
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公开(公告)号:US20180190518A1
公开(公告)日:2018-07-05
申请号:US15448060
申请日:2017-03-02
Applicant: Applied Materials, Inc.
Inventor: Ludovic GODET , Christine Y. OUYANG , Viachslav BABAYAN
IPC: H01L21/67 , H01L21/683
CPC classification number: H01L21/67069 , H01L21/0273 , H01L21/67103 , H01L21/67126 , H01L21/67248 , H01L21/67253 , H01L21/6838 , H01L21/68785
Abstract: Implementations described herein relate to apparatus and methods for processing a substrate. More specifically, a process chamber having movable electrodes for generating a parallel field within a process volume filled with a fluid is provided. In one implementation, a major axis of the process chamber is oriented vertically and a substrate support is disposed opposite a plurality of movable electrodes extending along the major axis of the process chamber. In certain implementations, the substrate support is electrically floating and capable of rotating about a minor axis of the process chamber during processing of a substrate.
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87.
公开(公告)号:US20180107117A1
公开(公告)日:2018-04-19
申请号:US15294348
申请日:2016-10-14
Applicant: Applied Materials, Inc.
Inventor: Christine Y. OUYANG , Sang Ki NAM , Ludovic GODET
CPC classification number: G03F7/203 , G03F7/0045 , G03F7/2004 , G03F7/325
Abstract: Methods disclosed herein provide apparatus and methods for applying an electric field and/or a magnetic field to a photoresist layer without air gap intervention during photolithography processes. In one embodiment, an apparatus includes a processing chamber configured to apply an electric field to a substrate via a non-gas phase intermediate medium. Methods described herein include dissociation of a photoacid generator to generate anions and cations. The anions may be moved within the photoresist layer by the electric field to more precisely control the speed and location of acid generation and regeneration processes.
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公开(公告)号:US20180046085A1
公开(公告)日:2018-02-15
申请号:US15793935
申请日:2017-10-25
Applicant: Applied Materials, Inc.
Inventor: Ludovic GODET , Sang Ki NAM , Christine Y. OUYANG
IPC: G03F7/38
CPC classification number: G03F7/38
Abstract: Embodiments described herein generally relate to methods for mitigating patterning defects. More specifically, embodiments described herein relate to utilizing field guided post exposure bake processes to mitigate microbridge photoresist defects. An electric field may be applied to a substrate being processed during a post exposure bake process. Photoacid generated as a result of the exposure may be moved along a direction defined by the electric field. The movement of the photoacid may contact microbridge defects and facilitate the removal of the microbridge defects from the surface of a substrate.
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公开(公告)号:US20160204027A1
公开(公告)日:2016-07-14
申请号:US14975231
申请日:2015-12-18
Applicant: Applied Materials, Inc.
Inventor: Annamalai LAKSHMANAN , Bencherki MEBARKI , Kaushal K. SINGH , Paul F. MA , Mehul B. NAIK , Andrew COCKBURN , Ludovic GODET
IPC: H01L21/768 , H01L21/285
CPC classification number: H01L21/76879 , H01L21/28518 , H01L21/2855 , H01L21/28556 , H01L21/32053 , H01L21/76802 , H01L21/76876 , H01L21/76886 , H01L21/76889 , H01L23/53257 , H01L23/53271 , H01L2221/1094
Abstract: Methods for direct deposition of a metal silicide nanowire for back-end interconnection structures for semiconductor applications are provided. In one embodiment, the method includes positioning a substrate in a processing region of a process chamber, the substrate having a first surface comprising a non-dielectric material; and a dielectric layer formed on the first surface. An opening is formed in the dielectric layer, the opening exposing at least a portion of the first surface, the opening having sidewalls. A metal silicide seed is deposited in the opening using a PVD process, wherein the PVD process is performed with either no bias or a bias which creates deposition on the sidewall which is less than 1% of the deposition on the first surface. A metal silicide layer is then selectively deposited on the metal silicide seed using a metal-silicon organic precursor, creating the metal silicide nanowire.
Abstract translation: 提供了用于半导体应用的后端互连结构的金属硅化物纳米线的直接沉积的方法。 在一个实施例中,该方法包括将衬底定位在处理室的处理区域中,该衬底具有包含非电介质材料的第一表面; 以及形成在第一表面上的电介质层。 在电介质层中形成开口,该开口露出第一表面的至少一部分,该开口具有侧壁。 使用PVD工艺在开口中沉积金属硅化物种子,其中PVD工艺是在没有偏压或偏压的情况下进行的,其产生在侧壁上的沉积,其小于第一表面上的沉积的1%。 然后使用金属硅有机前体将金属硅化物层选择性地沉积在金属硅化物种子上,产生金属硅化物纳米线。
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公开(公告)号:US20160163546A1
公开(公告)日:2016-06-09
申请号:US14613545
申请日:2015-02-04
Applicant: Applied Materials, Inc.
Inventor: Ludovic GODET , Srinivas D. NEMANI , Erica CHEN , Jun XUE , Ellie Y. YIEH , Gary E. DICKERSON
IPC: H01L21/033 , H01L21/762 , H01L23/00 , H01L21/84
CPC classification number: H01L21/0337 , H01J2237/24528 , H01L21/0332 , H01L21/0335 , H01L21/3105 , H01L21/31111 , H01L21/31116 , H01L21/31155 , H01L21/32 , H01L21/76205 , H01L21/7624 , H01L21/823431 , H01L21/823821 , H01L21/845 , H01L27/0886 , H01L27/0924 , H01L27/10879 , H01L27/1211 , H01L29/66795 , H01L29/66803 , H01L29/7831
Abstract: Embodiments of the present disclosure relate to precision material modification of three dimensional (3D) features or advanced processing techniques. Directional ion implantation methods are utilized to selectively modify desired regions of a material layer to improve etch characteristics of the modified material. For example, a modified region of a material layer may exhibit improved etch selectivity relative to an unmodified region of the material layer. Methods described herein are useful for manufacturing 3D hardmasks which may be advantageously utilized in various integration schemes, such as fin isolation and gate-all-around, among others. Multiple directional ion implantation processes may also be utilized to form dopant gradient profiles within a modified layer to further influence etching processes.
Abstract translation: 本公开的实施例涉及三维(3D)特征或高级处理技术的精密材料修改。 方向离子注入方法用于选择性地修饰材料层的所需区域以改善改性材料的蚀刻特性。 例如,材料层的改性区域相对于材料层的未改性区域可以表现出改进的蚀刻选择性。 本文描述的方法可用于制造3D硬掩模,其可以有利地用于各种集成方案中,例如翅片隔离和门全部等。 多方向离子注入工艺也可用于在改性层内形成掺杂剂梯度分布,以进一步影响蚀刻工艺。
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