THIN-FILM ELECTRO-OPTICAL WAVEGUIDE MODULATOR DEVICE

    公开(公告)号:US20210405399A1

    公开(公告)日:2021-12-30

    申请号:US17306853

    申请日:2021-05-03

    Abstract: An electro-optical waveguide modulator device includes a seed layer on a substrate, the seed layer having a first crystallographic plane aligned with a surface of the seed layer, an electro-optical channel extending in a first direction on the seed layer and having a second crystallographic plane aligned with the surface of the seed layer, an insulator layer on both sides of the electro-optical channel on the substrate in a second direction perpendicular to the first direction, an electrode barrier layer on the electro-optical channel and the insulator layer, and one or more of electrodes extending in the second direction. The seed layer and the insulator layer each comprise material having a refractive index that is lower than the electro-optical channel.

    METHODS FOR FORMING A METAL SILICIDE INTERCONNECTION NANOWIRE STRUCTURE

    公开(公告)号:US20190172686A1

    公开(公告)日:2019-06-06

    申请号:US16250763

    申请日:2019-01-17

    Abstract: Methods and apparatus for forming a metal silicide as nanowires for back-end interconnection structures for semiconductor applications are provided. In one embodiment, the method includes forming a metal silicide layer on a substrate by a chemical vapor deposition process or a physical vapor deposition process, thermal treating the metal silicide layer in a processing chamber, applying a microwave power in the processing chamber while thermal treating the metal silicide layer; and maintaining a substrate temperature less than 400 degrees Celsius while thermal treating the metal silicide layer. In another embodiment, a method includes supplying a deposition gas mixture including at least a metal containing precursor and a reacting gas on a surface of a substrate, forming a plasma in the presence of the deposition gas mixture by exposure to microwave power, exposing the plasma to light radiation, and forming a metal silicide layer on the substrate from the deposition gas.

    FIELD GUIDED POST EXPOSURE BAKE APPLICATION FOR PHOTORESIST MICROBRIDGE DEFECTS

    公开(公告)号:US20180046085A1

    公开(公告)日:2018-02-15

    申请号:US15793935

    申请日:2017-10-25

    CPC classification number: G03F7/38

    Abstract: Embodiments described herein generally relate to methods for mitigating patterning defects. More specifically, embodiments described herein relate to utilizing field guided post exposure bake processes to mitigate microbridge photoresist defects. An electric field may be applied to a substrate being processed during a post exposure bake process. Photoacid generated as a result of the exposure may be moved along a direction defined by the electric field. The movement of the photoacid may contact microbridge defects and facilitate the removal of the microbridge defects from the surface of a substrate.

    DIRECT DEPOSITION OF NICKEL SILICIDE NANOWIRE
    89.
    发明申请
    DIRECT DEPOSITION OF NICKEL SILICIDE NANOWIRE 有权
    直接沉积镍硅纳米管

    公开(公告)号:US20160204027A1

    公开(公告)日:2016-07-14

    申请号:US14975231

    申请日:2015-12-18

    Abstract: Methods for direct deposition of a metal silicide nanowire for back-end interconnection structures for semiconductor applications are provided. In one embodiment, the method includes positioning a substrate in a processing region of a process chamber, the substrate having a first surface comprising a non-dielectric material; and a dielectric layer formed on the first surface. An opening is formed in the dielectric layer, the opening exposing at least a portion of the first surface, the opening having sidewalls. A metal silicide seed is deposited in the opening using a PVD process, wherein the PVD process is performed with either no bias or a bias which creates deposition on the sidewall which is less than 1% of the deposition on the first surface. A metal silicide layer is then selectively deposited on the metal silicide seed using a metal-silicon organic precursor, creating the metal silicide nanowire.

    Abstract translation: 提供了用于半导体应用的后端互连结构的金属硅化物纳米线的直接沉积的方法。 在一个实施例中,该方法包括将衬底定位在处理室的处理区域中,该衬底具有包含非电介质材料的第一表面; 以及形成在第一表面上的电介质层。 在电介质层中形成开口,该开口露出第一表面的至少一部分,该开口具有侧壁。 使用PVD工艺在开口中沉积金属硅化物种子,其中PVD工艺是在没有偏压或偏压的情况下进行的,其产生在侧壁上的沉积,其小于第一表面上的沉积的1%。 然后使用金属硅有机前体将金属硅化物层选择性地沉积在金属硅化物种子上,产生金属硅化物纳米线。

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