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    Integrated Circuit Package For High Bandwidth Memory
    52.
    发明申请
    Integrated Circuit Package For High Bandwidth Memory 有权

    公开(公告)号：US20230042856A1

    公开(公告)日：2023-02-09

    申请号：US17970237

    申请日：2022-10-20

    Applicant: Google LLC

    Inventor： Nam Hoon Kim ,  Woon-Seong Kwon ,  Teckgyu Kang ,  Yujeong Shim

    IPC: H01L25/18 ,  H01L23/498 ,  H01L25/00 ,  H01L25/065

    Abstract: An integrated circuit package including a substrate configured to receive one or more high-bandwidth memory (HBM) stacks on the substrate, an interposer positioned on the substrate and configured to receive a logic die on the interposer, a plurality of interposer channels formed in the interposer and connecting the logic die to the one or more HBM stacks, and a plurality of substrate traces formed in the substrate and configured to interface the plurality of interposer channels to the one or more HBM stacks.

    Asic Package With Photonics And Vertical Power Delivery
    53.
    发明申请
    Asic Package With Photonics And Vertical Power Delivery 有权

    公开(公告)号：US20220139876A1

    公开(公告)日：2022-05-05

    申请号：US17579012

    申请日：2022-01-19

    Applicant: Google LLC

    Inventor： Woon-Seong Kwon ,  Namhoon Kim ,  Teckgyu Kang ,  Ryohei Urata

    IPC: H01L25/065 ,  G02B6/42 ,  H01L23/31 ,  H01L23/367 ,  H01L23/498 ,  H01L23/538 ,  H01L25/16

    Abstract: The technology relates to an integrated circuit (IC) package. The IC package may include a substrate. An IC die may be mounted to the substrate. One or more photonic modules may be attached to the substrate and one or more serializer/deserializer (SerDes) interfaces may connect the IC die to the one or more photonic modules. The IC die may be an application specific integrated circuit (ASIC) die and the one or more photonic modules may include a photonic integrated circuit (PIC) and fiber array. The one or more photonic modules may be mounted to one or more additional substrates which may be attached to the substrate via one or more sockets.

    Massive deep trench capacitor die fill for high performance application specific integrated circuit (ASIC) applications
    56.
    发明授权
    Massive deep trench capacitor die fill for high performance application specific integrated circuit (ASIC) applications 有权

    公开(公告)号：US10896873B2

    公开(公告)日：2021-01-19

    申请号：US16358197

    申请日：2019-03-19

    Applicant: Google LLC

    Inventor： Woon Seong Kwon ,  Nam Hoon Kim ,  Teckgyu Kang

    IPC: H01L23/522 ,  H01L49/02

    Abstract: A processor assembly and a system including a processor assembly are disclosed. The processor assembly includes an interposer disposed on a substrate, an integrated circuit disposed on the interposer, a memory circuit disposed on the interposer and coupled to the integrated circuit, and a capacitor embedded in the interposer. The capacitor includes at least a first non-planar conductor structure and a second non-planar conductor structure separated by a non-planar dielectric structure. The capacitor includes a first capacitor terminal electrically coupling the first non-planar conductor structure to a first voltage terminal in the integrated circuit. The capacitor includes a second capacitor terminal electrically coupling the second non-planar conductor structure to a second voltage terminal in the integrated circuit. The capacitor includes an oxide layer electrically isolating the capacitor from the interposer.

    Cooling electronic devices in a data center
    57.
    发明授权
    Cooling electronic devices in a data center 有权

    公开(公告)号：US10681846B2

    公开(公告)日：2020-06-09

    申请号：US15957161

    申请日：2018-04-19

    Applicant: Google LLC

    Inventor： Madhusudan Krishnan Iyengar ,  Christopher Gregory Malone ,  Yuan Li ,  Jorge Padilla ,  Woon-Seong Kwon ,  Teckgyu Kang ,  Norman Paul Jouppi

    IPC: H05K7/20 ,  H01L23/473

    Abstract: A server tray package includes a motherboard assembly that includes a plurality of data center electronic devices, the plurality of data center electronic devices including at least one heat generating processor device; and a liquid cold plate assembly. The liquid cold plate assembly includes a base portion mounted to the motherboard assembly, the base portion and motherboard assembly defining a volume that at least partially encloses the plurality of data center electronic devices; and a top portion mounted to the base portion and including a heat transfer member shaped to thermally contact the heat generating processor device, the heat transfer member including an inlet port and an outlet port that are in fluid communication with a cooling liquid flow path defined through the heat transfer member.

    HIGH BANDWIDTH MEMORY PACKAGE FOR HIGH PERFORMANCE PROCESSORS
    58.
    发明申请
    HIGH BANDWIDTH MEMORY PACKAGE FOR HIGH PERFORMANCE PROCESSORS 审中-公开

    公开(公告)号：US20190312002A1

    公开(公告)日：2019-10-10

    申请号：US15948456

    申请日：2018-04-09

    Applicant: Google LLC

    Inventor： Woon Seong Kwon ,  Nam Hoon Kim ,  Teckgyu Kang

    IPC: H01L23/00 ,  H01L25/18 ,  H01L25/00

    Abstract: Integrated component packages and methods of assembling integrated component packages are provided. The integrated component package can comprise a bump pitch relaxing layer. A high-bandwidth memory component directly mechanically coupled to the bump pitch relaxing layer on a first side of the bump pitch relaxing layer via a first set of bump bond connections. The high-bandwidth memory component directly electrically coupled to the bump pitch relaxing layer on the first side of the bump pitch relaxing layer via the first set of bump bond connections. The bump pitch relaxing layer mechanically coupled to a first side of a substrate via second set of bump bond connections. The high-bandwidth memory component electrically coupled to the substrate via the bump-pitch relaxing layer and the second set of bump bond connections, and a bump pitch of the second set of bump bond connections is larger than the first set of bump bond connections.

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