公开(公告)号：US20240063272A1

公开(公告)日：2024-02-22

申请号：US17821165

申请日：2022-08-20

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： JEN-YUAN CHANG

IPC分类号： H01L29/30 ,  H01L25/065 ,  H01L23/00

CPC分类号： H01L29/30 ,  H01L25/0657 ,  H01L24/32 ,  H01L2224/32145

摘要： A semiconductor structure includes a die structure including: a substrate having a sidewall; a dielectric disposed over the substrate; an interconnect structure disposed within the dielectric; and a capping member surrounding the die structure, wherein the sidewall of the substrate includes a plurality of recesses extending into the substrate, and each of the plurality of recesses surrounds at least a portion of the capping member.

公开(公告)号：US11898269B2

公开(公告)日：2024-02-13

申请号：US16868528

申请日：2020-05-06

申请人： SLT Technologies, Inc

发明人： Wenkan Jiang ,  Dirk Ehrentraut ,  Mark P. D'Evelyn

IPC分类号： C30B29/40 ,  C01B21/06 ,  H01L29/20 ,  H01L29/30 ,  C30B7/10

CPC分类号： C30B29/406 ,  C01B21/0632 ,  C30B7/105 ,  H01L29/2003 ,  H01L29/30 ,  C01P2002/30 ,  C01P2002/74 ,  C01P2002/80 ,  C01P2006/80

摘要： A gallium-containing nitride crystals are disclosed, comprising: a top surface having a crystallographic orientation within about 5 degrees of a plane selected from a (0001)+c-plane and a (000-1)−c-plane; a substantially wurtzite structure; n-type electronic properties; an impurity concentration of hydrogen greater than about 5×1017 cm−3, an impurity concentration of oxygen between about 2×1017 cm−3 and about 1×1020 cm−3, an [H]/[O] ratio of at least 0.3; an impurity concentration of at least one of Li, Na, K, Rb, Cs, Ca, F, and Cl greater than about 1×1016 cm−3, a compensation ratio between about 1.0 and about 4.0; an absorbance per unit thickness of at least 0.01 cm−1 at wavenumbers of approximately 3175 cm−1, 3164 cm−1, and 3150 cm−1, and wherein, at wavenumbers between about 3200 cm−1 and about 3400 cm−1 and between about 3075 cm−1 and about 3125 cm−1, said gallium-containing nitride crystal is essentially free of infrared absorption peaks having an absorbance per unit thickness greater than 10% of the absorbance per unit thickness at 3175 cm.

公开(公告)号：US20200263321A1

公开(公告)日：2020-08-20

申请号：US16868528

申请日：2020-05-06

申请人： SLT Technologies, Inc

发明人： Wenkan JIANG ,  Dirk EHRENTRAUT ,  Mark P. D'EVELYN

IPC分类号： C30B29/40 ,  H01L29/30 ,  H01L29/20 ,  C30B7/10 ,  C01B21/06

摘要： A gallium-containing nitride crystals are disclosed, comprising: a top surface having a crystallographic orientation within about 5 degrees of a plane selected from a (0001) +c-plane and a (000-1) −c-plane; a substantially wurtzite structure; n-type electronic properties; an impurity concentration of hydrogen greater than about 5×1017 cm−3, an impurity concentration of oxygen between about 2×1017 cm−3 and about 1×1020 cm−3, an [H]/[O] ratio of at least 0.3; an impurity concentration of at least one of Li, Na, K, Rb, Cs, Ca, F, and Cl greater than about 1×1016 cm−3, a compensation ratio between about 1.0 and about 4.0; an absorbance per unit thickness of at least 0.01 cm−1 at wavenumbers of approximately 3175 cm−1, 3164 cm−1, and 3150 cm−1, and wherein, at wavenumbers between about 3200 cm−1 and about 3400 cm−1 and between about 3075 cm−1 and about 3125 cm−1, said gallium-containing nitride crystal is essentially free of infrared absorption peaks having an absorbance per unit thickness greater than 10% of the absorbance per unit thickness at 3175 cm.

公开(公告)号：US20180151379A1

公开(公告)日：2018-05-31

申请号：US15362996

申请日：2016-11-29

申请人： THE UNITED STATES GOVERMENT AS REPRESENTED BY THE SECRETARY OF THE ARMY-U.S. ARMY RESEARCH LABORATOR

发明人： MATTHEW HENDERSON ERVIN ,  NICHOLAS WILLIAM PIEKIEL ,  CHRISTOPHER JAMES MORRIS ,  WAYNE ANTHONY CHURAMAN

IPC分类号： H01L21/3063 ,  H01L21/308 ,  H01L21/283 ,  H01L21/3213 ,  H01L29/45 ,  H01L29/30

CPC分类号： H01L21/3063 ,  H01L21/283 ,  H01L21/3081 ,  H01L21/3086 ,  H01L21/32134 ,  H01L29/30 ,  H01L29/456

摘要： A method of manufacturing a porous silicon (PSi) includes providing a semiconductor wafer; depositing a mask layer on a first side of the semiconductor wafer; patterning the mask layer to expose portions of semiconductor material of the semiconductor wafer; depositing a metal layer onto the patterned mask layer on a second side of the semiconductor wafer; and etching the semiconductor wafer where exposed by patterned portions of any of the mask layer and the metal layer thereby creating PSi regions at a surface of the semiconductor wafer. The method may further include patterning the metal layer prior to etching to form at least one electrode. The etching may include etching the semiconductor wafer with HF, a solvent, and hydrogen peroxide. The metal layer may form a plurality of electrodes segmented from each other.

公开(公告)号：US20170263633A1

公开(公告)日：2017-09-14

申请号：US15262274

申请日：2016-09-12

申请人： Kabushiki Kaisha Toshiba

发明人： Hirokazu ISHIGAKI ,  Tatsuya Okamoto ,  Masao Shingu

IPC分类号： H01L27/115 ,  H01L21/28 ,  H01L21/02 ,  H01L29/30

CPC分类号： H01L27/11582 ,  H01L21/02233 ,  H01L21/28282 ,  H01L27/11568 ,  H01L29/30

摘要： According to the embodiment, a semiconductor device includes: a substrate; a stacked body provided on the substrate and including a plurality of electrode layers stacked with an insulator interposed; a semiconductor pillar provided on the substrate and in the stacked body; a semiconductor body provided in the stacked body; and an insulating film including a charge storage film provided between the plurality of electrode layers and the semiconductor body, and extending in the stacking direction. The semiconductor body includes a first portion and a second portion. The first portion is surrounded with the plurality of electrode layers and extends in a stacking direction of the stacked body. The second portion is in contact with an upper surface of the semiconductor pillar.

公开(公告)号：US20170178891A1

公开(公告)日：2017-06-22

申请号：US15379759

申请日：2016-12-15

申请人： Ostendo Technologies, Inc.

发明人： Gregory Batinica ,  Kameshwar Yadavalli ,  Qian Fan ,  Benjamin A. Haskell ,  Hussein S. El-Ghoroury

IPC分类号： H01L21/02 ,  H01L23/00 ,  H01L29/30 ,  H01L29/20 ,  H01L21/66 ,  H01L23/31

CPC分类号： H01L21/02035 ,  H01L21/02002 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02172 ,  H01L21/02274 ,  H01L22/12 ,  H01L22/20 ,  H01L23/3171 ,  H01L23/562 ,  H01L24/94 ,  H01L29/2003 ,  H01L29/30 ,  H01L2224/94 ,  H01L2924/3511

摘要： A method to improve the planarity of a semiconductor wafer and an assembly made from the method. In a preferred embodiment of the method, a compressive PECVD oxide layer such as SiO2 having a predetermined thickness or pattern is deposited on the second surface of a semiconductor wafer having an undesirable warp or bow. The thickness or pattern of the deposited oxide layer is determined by the measured warp or bow of the semiconductor wafer. The compressive oxide layer induces an offsetting compressive force on the second surface of the semiconductor wafer to reduce the warp and bow across the major surface of the semiconductor wafer.

公开(公告)号：US09368577B2

公开(公告)日：2016-06-14

申请号：US14276560

申请日：2014-05-13

申请人： FUJI ELECTRIC CO., LTD.

发明人： Hiroshi Takishita ,  Takashi Yoshimura ,  Masayuki Miyazaki ,  Hidenao Kuribayashi

IPC分类号： H01L23/58 ,  H01L29/30 ,  H01L29/167 ,  H01L21/04 ,  H01L21/425 ,  H01L29/10 ,  H01L21/263 ,  H01L29/32 ,  H01L29/739 ,  H01L29/861 ,  H01L29/66

CPC分类号： H01L29/0615 ,  H01L21/263 ,  H01L29/1095 ,  H01L29/32 ,  H01L29/36 ,  H01L29/6609 ,  H01L29/66333 ,  H01L29/66348 ,  H01L29/7395 ,  H01L29/7397 ,  H01L29/861

摘要： Proton irradiation is performed a plurality of times from rear surface of an n-type semiconductor substrate, which is an n− drift layer, forming an n-type FS layer having lower resistance than the n-type semiconductor substrate in the rear surface of the n− drift layer. When the proton irradiation is performed a plurality of times, the next proton irradiation is performed to as to compensate for a reduction in mobility due to disorder which remains after the previous proton irradiation. In this case, the second or subsequent proton irradiation is performed at the position of the disorder which is formed by the previous proton irradiation. In this way, even after proton irradiation and a heat treatment, the disorder is reduced and it is possible to prevent deterioration of characteristics, such as increase in leakage current. It is possible to form an n-type FS layer including a high-concentration hydrogen-related donor layer.

摘要翻译： 从作为n漂移层的n型半导体衬底的后表面进行质子照射多次，形成具有比n型半导体衬底的电阻低于n型半导体衬底的n型FS层的n型FS层 n-漂移层。 当多次进行质子照射时，进行下一个质子照射以补偿由于在先前的质子照射之后残留的无序而导致的迁移率的降低。 在这种情况下，第二次或随后的质子照射在由先前的质子照射形成的病症的位置进行。 以这种方式，即使在质子照射和热处理之后，紊乱也减少，并且可以防止诸如漏电流增加的特性劣化。 可以形成包括高浓度氢相关供体层的n型FS层。

公开(公告)号：US09276071B2

公开(公告)日：2016-03-01

申请号：US14276546

申请日：2014-05-13

申请人： FUJI ELECTRIC CO., LTD.

发明人： Takashi Yoshimura ,  Masayuki Miyazaki ,  Hiroshi Takishita ,  Hidenao Kuribayashi

IPC分类号： H01L29/30 ,  H01L21/425 ,  H01L21/265 ,  H01L29/32 ,  H01L29/36 ,  H01L29/66 ,  H01L29/739 ,  H01L29/861 ,  H01L29/08 ,  H01L21/263 ,  H01L29/10 ,  H01L29/06 ,  H01L21/324

CPC分类号： H01L29/063 ,  H01L21/263 ,  H01L21/26506 ,  H01L21/26513 ,  H01L21/324 ,  H01L29/0619 ,  H01L29/0834 ,  H01L29/1095 ,  H01L29/32 ,  H01L29/36 ,  H01L29/66128 ,  H01L29/7395 ,  H01L29/861 ,  H01L29/8611

摘要： Hydrogen atoms and crystal defects are introduced into an n− semiconductor substrate by proton implantation. The crystal defects are generated in the n− semiconductor substrate by electron beam irradiation before or after the proton implantation. Then, a heat treatment for generating donors is performed. The amount of crystal defects is appropriately controlled during the heat treatment for generating donors to increase a donor generation rate. In addition, when the heat treatment for generating donors ends, the crystal defects formed by the electron beam irradiation and the proton implantation are recovered and controlled to an appropriate amount of crystal defects. Therefore, for example, it is possible to improve a breakdown voltage and reduce a leakage current.

摘要翻译： 通过质子注入将氢原子和晶体缺陷引入到n-半导体衬底中。 通过在质子注入之前或之后的电子束照射在n半导体衬底中产生晶体缺陷。 然后，进行用于产生供体的热处理。 在用于产生供体的热处理期间适当地控制晶体缺陷的量以增加供体生成速率。 此外，当用于发生供体的热处理结束时，通过电子束照射和质子注入形成的晶体缺陷被回收并被控制到适当量的晶体缺陷。 因此，例如，可以提高击穿电压并减小漏电流。

公开(公告)号：US09171911B2

公开(公告)日：2015-10-27

申请号：US14322659

申请日：2014-07-02

申请人： Efficient Power Conversion Corporation

发明人： Chunhua Zhou ,  Jianjun Cao ,  Alexander Lidow ,  Robert Beach ,  Alana Nakata ,  Robert Strittmatter ,  Guangyuan Zhao ,  Seshadri Kolluri ,  Yanping Ma ,  Fang Chang Liu ,  Ming-Kun Chiang ,  Jiali Cao

IPC分类号： H01L29/778 ,  H01L29/30 ,  H01L29/20 ,  H01L29/66 ,  H01L21/76 ,  H01L27/06

CPC分类号： H01L29/2003 ,  H01L21/76 ,  H01L27/0605 ,  H01L29/66462 ,  H01L29/778 ,  H01L29/7786

摘要： An integrated semiconductor device which includes a substrate layer, a buffer layer formed on the substrate layer, a gallium nitride layer formed on the buffer layer, and a barrier layer formed on the gallium nitride layer. Ohmic contacts for a plurality of transistor devices are formed on the barrier layer. Specifically, a plurality of first ohmic contacts for the first transistor device are formed on a first portion of the surface of the barrier layer, and a plurality of second ohmic contacts for the second transistor device are formed on a second portion of the surface of the barrier layer. In addition, one or more gate structures formed on a third portion of the surface of the barrier between the first and second transistor devices. Preferably, the one or more gate structures and the spaces between the gate structures and the source contacts of the transistor devices collectively form an isolation region that electrically isolates the first transistor device from the second transistor device.

摘要翻译： 一种集成半导体器件，包括衬底层，形成在衬底层上的缓冲层，形成在缓冲层上的氮化镓层以及形成在氮化镓层上的阻挡层。 在阻挡层上形成多个晶体管器件的欧姆接触。 具体地说，用于第一晶体管器件的多个第一欧姆触点形成在阻挡层表面的第一部分上，并且用于第二晶体管器件的多个第二欧姆触点形成在第二晶体管器件的表面的第二部分上 阻挡层。 此外，形成在第一和第二晶体管器件之间的势垒表面的第三部分上的一个或多个栅极结构。 优选地，一个或多个栅极结构和晶体管器件的栅极结构和源极触点之间的空间共同形成将第一晶体管器件与第二晶体管器件电隔离的隔离区域。

公开(公告)号：US09166008B2

公开(公告)日：2015-10-20

申请号：US14110574

申请日：2012-05-16

申请人： Itaru Gunjishima ,  Yasushi Urakami ,  Ayumu Adachi

发明人： Itaru Gunjishima ,  Yasushi Urakami ,  Ayumu Adachi

IPC分类号： H01L31/0312 ,  H01L29/30 ,  H01L29/04 ,  H01L29/16 ,  C30B23/02 ,  C30B29/36 ,  H01L29/32 ,  H01L29/861 ,  H01L21/02

CPC分类号： H01L29/30 ,  C30B23/025 ,  C30B29/36 ,  H01L21/02378 ,  H01L21/02433 ,  H01L21/02529 ,  H01L21/0254 ,  H01L29/045 ,  H01L29/1608 ,  H01L29/32 ,  H01L29/861

摘要： An SiC single crystal having at least one orientation region where a basal plane dislocation has a high linearity and is oriented to three crystallographically-equivalent directions, and an SiC wafer and a semiconductor device which are manufactured from the SiC single crystal. The SiC single crystal can be manufactured by using a seed crystal in which the offset angle on a {0001} plane uppermost part side is small and the offset angle on an offset direction downstream side is large and growing another crystal on the seed crystal.

摘要翻译： 具有至少一个取向区域的​​SiC单晶，其中基面位错具有高线性度并且取向为三个晶体上等同的<11-20>方向，以及由SiC单晶制造的SiC晶片和半导体器件 。 SiC单晶可以通过使用其中{0001}平面最上部分侧的偏移角小并且偏移方向下游侧的偏移角大并且在晶种上生长另一晶体的晶种来制造。